Samsung Electronics Co., Ltd.

Mi-seon Kang

Ho-Sung Song

Byung-sick Moon

A semiconductor memory device secures a margin of data setup time and hold time of a data terminal and includes a delay locked loop, an output replica, an output driver, and an output multiplexer. The delay locked loop compares phases of external and feedback clock signals, and generates internal and delayed internal clock signals. The output replica receives memory cell data, generates the feedback control signal and controls load of a line of the feedback control signal to generate the feedback clock signal, responsive to current control signals for controlling current of the data terminal. The output multiplexer delays the memory cell data by a predetermined time in synchronization with the internal clock signal and responsive to the current control signals. The output driver is driven by the current control signals and the delayed memory cell data, and determines voltage level of the data terminal.

Semiconductor memory device for providing margin of data setup time and data hold time of data terminal

Reference voltage regulators and methods for integrated circuit output driver systems generate an initial supplementary current for the integrated circuit output driver system at the reference voltage for a predetermined time period in response to an output enable signal. Preferably, sufficient initial supplementary current is generated to compensate for an initial drop in the reference voltage that is generated by a reference voltage generator upon initial activation of the output driver system. Reference voltage generators according to embodiments of the invention may be included in an integrated circuit output driver system that is responsive to a reference voltage and to an output enable signal, and that varies in current drive capability in response to a current drive control signal. These embodiments of reference voltage regulators include a reference voltage generator that generates the reference voltage for the integrated circuit output driver system. A supplementary current generator generates an initial supplementary current for the integrated circuit output driver system at the reference voltage for a predetermined time period in response to the output enable signal. In some embodiments, the supplementary current generator generates a fixed initial supplementary current for the integrated circuit output driver system. In other embodiments, the supplementary current generator generates a variable initial supplementary current for the integrated circuit output driver system at the reference voltage for the predetermined time period in response to the output enable signal, and that varies in response to the current drive control signal.

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Seoul, South Korea

Mi-seon Kang