Semiconductor Manufacturing International (shanghai) Corporation

Mengmeng Guo

Fei Liu

Hua Tang

Haifeng Yang

Benpeng Xun

The present disclosure provides an asynchronous successive approximation register analog-to-digital conversion (ASAR ADC) circuit, including: a comparator circuit, an XOR gate circuit, an ASAR logic circuit, a metastable state detection (MD) circuit, a capacitor, and a digital-to-analog converter (DAC) circuit. The comparator circuit has a first input terminal connected to an analog signal, a first output terminal of the comparator circuit respectively connected to a first input terminal of the ASAR circuit and a first input terminal of the XOR gate circuit, a second output terminal of the comparator circuit respectively connected to a second input terminal of the ASAR gate circuit and a second input terminal of the XOR gate circuit, and an enable signal input terminal connected to a control signal output terminal of the ASAR logic circuit. The XOR gate circuit has an output terminal connected to a third input terminal of the ASAR logic circuit.

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Shanghai, China

Mengmeng Guo