Taiwan Semiconductor Manufacturing Comp. Ltd.

Meng-i Kang

Yen-Liang Lin

Ching-Hung Kao

Anhao Cheng

Chung-Lei Chen

Kai-Chi Wu

Kuo-Fang Ting

A semiconductor device includes a first silicon layer. The semiconductor device includes a plurality of first buried oxide layers embedded in the first silicon layer. The semiconductor device includes a second silicon layer disposed over the plurality of first buried oxide layers. Vertical distances between the plurality of first buried oxide layers and the second silicon layer, respectively, are different.

Semiconductor devices and methods of manufacturing thereof

An integrated circuit (IC) with active and dummy device cell arrays and a method of fabricating the same are discloses. The IC includes a substrate, an active device cell, and a dummy device cell. The active device cell includes an array of source/drain (S/D) regions of a first conductivity type disposed on or within the substrate and an array of gate structures with a first gate fill material disposed on the substrate. The dummy device cell includes a first array of S/D regions of the first conductivity type disposed on or within the substrate, a second array of S/D regions of a second conductivity type disposed on or within the substrate, and an array of dual gate structures disposed on the substrate. Each of the dual gate structures includes the first gate fill material and a second gate fill material that is different from the first gate fill material.

Profile control of gate structures in semiconductor devices

Growing community of inventors

Changhua County, Taiwan

Meng-i Kang