Taiwan Semiconductor Manufacturing Comp. Ltd.

Meng-Chang Ho

Chi-Feng Huang

Victor Chiang Liang

Fu-Huan Tsai

Fang-Ting Kuo

Yu-Lin Wei

Chia-Chung Chen

Chung-Hao Chu

Tz-Hau Guo

Ching-Hung Kao

Tzy-Kuang Lee

Kun-Mao Wu

Pei-Jen Wang

A method of forming a capacitor is disclosed. The method includes forming a portion of a metallization layer on a substrate, forming a via layer on the substrate, and forming a first electrode between the metallization layer and the via layer, where the first electrode is electrically connected to the metallization layer. The method also includes forming a second electrode between the metallization layer and the via layer, where the second electrode is electrically connected to the via layer, and forming a dielectric layer between the first electrode and the second electrode, where the first electrode is not electrically connected to any other conductors other than through the metallization layer, and where the second electrode is not electrically connected to any conductors other than through the via layer.

High density capacitor

A low noise device includes an isolation feature in a substrate. The low noise device further includes a gate stack over a channel in the substrate, wherein the isolation feature is adjacent to the channel. The low noise device further includes a spacer surrounding a portion of the gate stack, wherein an edge of the gate stack is spaced from an edge of the isolation feature adjacent to the spacer by a distance ranging from a minimum spacing distance to about 0.3 microns (&#x3bc;m).

Semiconductor device and method of forming the same

A semiconductor device includes a composite gate structure formed over a semiconductor substrate. The composite gate structure includes a gate dielectric layer, a metal layer, and a semiconductor layer. The metal layer is disposed on the gate dielectric layer. The semiconductor layer is disposed on the gate dielectric layer. The metal layer surrounds the semiconductor layer.

Semiconductor device

A semiconductor device includes a substrate and an isolation feature. The isolation feature includes a first portion in the substrate, and a second portion extending along a top surface of the substrate, wherein a bottom surface of the second portion is below the top surface of the substrate. The semiconductor device further includes a gate structure over the substrate, wherein the gate structure extends along a top surface of the second portion of the isolation feature.

A method of making a semiconductor device includes etching a substrate to define a trench in a substrate, wherein the trench is adjacent to an active region in the substrate, and etching the substrate includes patterning a mask. The method further includes partially removing the mask to expose a first portion of the active region, wherein the first portion extends a first distance from the trench. The method further includes depositing a dielectric material to fill the trench and cover the first portion of the active region. The method further includes removing the mask, wherein the removing of the mask includes maintaining the dielectric material covering the first portion of the active region. The method further includes forming a gate structure over the active region and over the dielectric material.

Method of making a semiconductor device

A semiconductor device includes a substrate, wherein the substrate includes a channel region. The semiconductor device further includes an isolation feature in the substrate. The isolation feature includes a first portion in the substrate, and a second portion extending along a top surface of the substrate. The second portion partially covers the channel region. The semiconductor device further includes a gate structure over the substrate, wherein the gate structure partially covers the second portion of the isolation feature.

A semiconductor device includes a composite gate structure formed over a semiconductor substrate. The composite gate structure includes a gate dielectric layer, a metal feature, and a semiconductor feature. The metal feature is disposed on the gate dielectric layer. The semiconductor feature is disposed on the gate dielectric layer. The metal feature and the semiconductor feature are stacked on the gate dielectric layer side by side.

Semiconductor device and manufacturing method thereof

A low noise device includes an isolation feature in a substrate. The low noise device further includes a gate stack over a channel in the substrate. The gate stack includes a gate dielectric layer extending over a portion of the isolation feature, and a gate electrode over the gate dielectric layer. The low noise device further includes a charge trapping reducing structure adjacent to the isolation feature. The charge trapping reducing structure is configured to reduce a number of charge carriers adjacent an interface between the isolation feature and the channel.

Growing community of inventors

Hsinchu, Taiwan

Meng-Chang Ho