General Electric Company

The University of Texas System

Menahem Lowy

Amer A Hassan

John Erik Hershey

Robert J Wojnarowski

William E Engeler

Lionel M Levinson

Kenneth B Welles, Ii

Richard Louis Frey

Michael Gdula

John T Pedicone

A parallel architecture for implementing a digital sequence generator is provided, which contains taps connected to selected fixed memory cells and the taps of the logic circuitry are switched among the cells. The architecture disclosed and claimed herein generates an identical sequence while consuming substantially less power than a linear feedback shift register implementation. The parallel architecture may also be used to implement a parallel shift register in other applications.

Parallel architecture for generating pseudo-random sequences

A munitions cartridge transmitter capable of emitting an electromagnetic signal after discharge from a cartridge propelling device comprises a signal generator, an electromagnetic signal transmitter coupled to the generator, an antenna coupled to the transmitter, and a hollow cartridge for housing the generator, the transmitter, and the antenna. The transmitter is energized after discharge of the cartridge propelling device by a power source contained in the cartridge.

Munitions cartridge transmitter

A CMOS programmable logic array includes a logical AND plane receiving a first group of input logic signals for forming a second group of logic minterms, and a logical OR plane receiving the logic minterms for forming a third group of output logic signals. Each type of logical plane contains a plurality of logic gates. Each plane type can be formed from the other plane type by the addition of a logic inverter to each input, and output of, that other-type plane. Interconnections determine the combination of input signals used to define the logic equation of the signal at the output of each logic gate of each plane. Static latches are used to retain the states of input and minterm logic signals. Logic planes and latches can be operated responsive to a two-phase clock signal.

Static CMOS programmable logic array

Growing community of inventors

Arlington, TX, United States of America

Menahem Lowy