Western Digital Corporation

Melvin L Marmet

Kenneth W Ouyang

Alan Y Lee

Kwok Fai Lee

Kowk Fai Lee

An electrostatic discharge protection circuit employing an extended resistive structure having bimodal resistance characteristics in series with an input/output buffer circuit and an input/output electrical contact pad on an integrated circuit. The extended resistive structure is integrally formed with the device or devices in the buffer circuit most susceptible to damage due to ESD breakdown effects In a first resistance mode during normal circuit operations, the resistor has a low resistance value and introduces virtually no additional load to the input/output buffer circuitry. In a second mode of operation during ESD discharge, the resistor has a second significantly higher resistance which reduces current values during the ESD event thereby protecting the buffer circuit. Thick oxide snap-back device is also employed to provide a parallel ESD discharge path with low power dissipation.

Electro-static discharge protection circuit with bimodal resistance

An electrostatic discharge protection circuit employing an extended resistive structure having bimodal resistance characteristics in series with an input/output buffer circuit and an input/output electrical contact pad on an integrated circuit. The extended resistive structure is integrally formed with the device or devices in the buffer circuit most susceptible to damage due to ESD breakdown effects. In a first resistance mode during normal circuit operations, the resistor has a low resistance value and introduces virtually no additional load to the input/output buffer circuitry. In a second mode of operation during ESD discharge, the resistor has a second significantly higher resistance which reduces current values during the ESD event thereby protecting the buffer circuit. Thick oxide snap-back device is also employed to provide a parallel ESD discharge path with low power dissipation.

A charge pump implemented in a CMOS monolithic circuit provides a precise output charging current source or current sink with fast switching characteristics. Each of two CMOS output transistors is connected via a transmission gate to a transistor having a constant current flow through it. An MOS capacitor is connected to the gates of the constant current transistors. When a transmission gate is closed, the respective output transistor is coupled to the constant current transistor in a current mirror configuration. The output transistor is quickly switched on to cause a step change in output current.

Fast switching charge pump

A power-up reset circuit for providing a reset signal for resetting circuit elements such as flip-flops upon the application of power to the circuit includes a CMOS pair output section and a capacitor coupled to the gates of the CMOS transistors. The capacitor is charged up by the power supply to switch the reset signal to a low level after the resetting operation has been achieved. In order to accommodate slow ramping power supplies, circuitry operating as a voltage sensitive switch is included to prevent the capacitor from charging until the power supply voltage has reached a sufficient level to ensure proper operation. In order to accommodate fast ramping power supplies, the charging rate of the capacitor is controlled to assure a minimum necessary duration of the reset signal.

Voltage level sensing power-up reset circuit

A CMOS voltage controlled oscillator includes a reference capacitor which is charged and discharged by current source and sink output transistors. The output transistors are connected to control transistors in a current mirror fashion with current through the control transistors being maintained at a level proportional to the value of a control input voltage. The control transistors are selectively connected to the output transistors in a current mirror configuration to provide either current source or sink operation. Transmission gates are connected between the gates of the output and control transistors and selectively closed to render the proper output transistor conductive to achieve source or sink operation. MOS capacitors are connected to the control transistors to facilitate rapid switching of the output transistors to enable high frequency operation of the voltage controlled oscillator.

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San Clemente, CA, United States of America

Melvin L Marmet