Intel Corporation

Melton C Bost

Simon Yang

Timothy L Deeter

Shi-Ning Yang

Yeochung Yen

Robert A Gasser

Jim Baldo

Barbara Greenebaum

Peter K Charvat

Krishnamurthy Murali

Robert C Lindstedt

Maxine Fassberg

Lynn A Price

A method of forming a guard wall for a semiconductor die is described. A dielectric layer is deposited over a semiconductor substrate. The dielectric layer is patterned to form a guard wall opening extending through the dielectric layer. The guard wall opening lies adjacent to an electrically active region of the die. The guard wall opening has a pattern without any straight line segments greater than about 10 .mu.m long. A first layer is deposited over the substrate and etched to form a first layer sidewall spacer along a side of the guard wall opening. A second layer is deposited within the guard wall opening to form the guard wall.

Guard wall to reduce delamination effects within a semiconductor die

A tri-layer titanium coating for an aluminum layer of a semiconductor device. An aluminum layer used for interconnecting individual devices of an integrated circuit is formed on a semiconductor material. A first titanium nitride layer is deposited on the aluminum layer. A titanium layer is deposited on the first titanium nitride layer. A second titanium nitride layer is then deposited on the titanium layer. The tri-layer titanium coating prevents the formation of Al.sub.2 O.sub.3 and AIF.sub.3 during the etching of a via hole in an intermetal dielectric layer deposited above the second titanium nitride layer.

Tri-layer titanium coating for an aluminum layer of a semiconductor

Method of forming a guard wall to reduce delamination effects

A process for forming a protective polyimide layer over a semiconductor substrate includes the steps of curing a deposited polyamic acid layer at a temperature which is sufficient to reduce the etch rate of the acid layer when subsequently exposed to a developer. After formation of a photoresist masking layer over the polyamic acid, the substrate is exposed to a developer to define a plurality of bonding pad openings therein. The developer permeates into the acid layer to form a salt in the regions beneath the openings. Subsequent hardbaking imidizes the polyamic acid, but not the salt regions. Removing the photoresist layer also develops the polyimide which removes the salt regions to expose the underlying bonding pads.

Polyimide process for protecting integrated circuits

A tri-layer titanium coating for an aluminum layer of a semiconductor device. An aluminum layer used for interconnecting individual devices of an integrated circuit is formed on a semiconductor material. A first titanium nitride layer is deposited on the aluminum layer. A titanium layer is deposited on the first titanium nitride layer. A second titanium nitride layer is then deposited on the titanium layer. The tri-layer titanium coating prevents the formation of Al.sub.2 O.sub.3 and AlF.sub.3 during the etching of a via hole in an intermetal dielectric layer deposited above the second titanium nitride layer.

Process of forming a tri-layer titanium coating for an aluminum layer of

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Hillsboro, OR, United States of America

Melton C Bost