International Business Machines Corporation

Globalfoundries Inc.

Melissa J Roma

David A DeMuynck

Matthew D Moon

Shawn A Adderly

Craig E Schneider

Daniel A Delibac

Shawn R Goddard

Kyle Babinski

Edward Crandal Cooney, Iii

Gary L Milo

Dinh Dang

Sarah A McTaggart

Thomas W Weeks

Jeffrey L Thompson

A method including forming a first metal wire in a first dielectric layer, the first metal wire including a first vertical side opposite from a second vertical side; and forming a second metal wire in a second dielectric layer above the first dielectric layer, the second metal wire including a third vertical side opposite from a fourth vertical side, where the first vertical side is laterally offset from the third vertical side by a first predetermined distance, and the second vertical side is laterally offset from the fourth vertical side by a second predetermined distance, where the first metal wire and the second metal wire are in direct contact with one another.

Metal wires of a stacked inductor

Disclosed is a method of manufacturing integrated circuit (IC) chips. In the method, wafers are received and the backside roughness levels of these wafers are determined. Based on the backside roughness levels, the wafers are sorted into different groups. Chips having the same design are manufactured on wafers from all of the different groups. However, during manufacturing, process(es) is/are performed differently on wafers from one or more of the different groups to minimize systematic variations in a specific parameter (e.g., wire width) in the resulting chips. Specifically, because systematic variations may occur when the exact same processes are used to form IC chips on wafers with different backside roughness levels, the method disclosed herein selectively adjusts one or more of those processes when performed on wafers from one or more of the different groups to ensure that the specific parameter is approximately equal in the resulting integrated IC chips.

Method of fine-tuning process controls during integrated circuit chip manufacturing based on substrate backside roughness

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Bend, OR, United States of America

Melissa J Roma