Western Digital Technologies, Inc.

Mei-Man L Syu

William Bernard Boyle

Matthew Lewis Call

Lan Dinh Phan

Virgil V Wilkins

Ho-Fan Kang

Alan T Meyer

Robert L Horn

Jing Booth

Andrew John Tomlin

Dengtao Zhao

John A Morrison

William C Cain

Dmitry Obukhov

Kamyar Souri

Kroum Stanimirov Stoev

Haibo Li

Yongke Sun

Dominic S Suryabudi

Robert Morelli Fallone

Jui-Yao Yang

Marvin R Deforest

Cliff Pajaro

Disclosed embodiments are directed to systems and methods for improving garbage collection and wear leveling performance in data storage systems. The embodiments can improve the efficiency of static wear leveling by picking the best candidate block for static wear leveling and/or postponing static wear leveling on certain candidate blocks. In one embodiment, one or more source blocks for a static wear leveling operation are selected based at least on whether the one or more blocks have a low P/E count and contain static data, such as data that has been garbage collected.

Systems and methods for improving garbage collection and wear leveling performance in data storage systems

Disclosed embodiments are directed to systems and methods for assigning and selecting memory units for internal memory operations in data storage systems. The embodiments can improve the efficiency of garbage collection operations by directing dynamic data into memory units with a relatively lower P/E count, directing static and system data into memory units with a relatively higher P/E count, and not mixing static and dynamic data by packing static data into separate memory units from dynamic data. In one embodiment, after completion of garbage collection of blocks, the blocks are each assigned to one of a cool down list and an available memory unit list based on a size limit of the cool down list and a number of program-erase (P/E) operations performed on each block. The blocks are subsequently selected from the lists for write operations according to whether write data includes static or dynamic data.

Memory unit assignment and selection for internal memory operations in data storage systems

A non-volatile semiconductor memory is disclosed comprising a first memory device and control circuitry operable to issue an access command to the first memory device. A command status is requested from the first memory device after a status delay. When the command status indicates the first memory device has completed the command, a first access time of the memory device is measured. An access sequence of the first memory device is then modified in response to the access time.

Adjusting access of non-volatile semiconductor memory based on access time

Systems and methods for retaining data are disclosed in which refresh copy operations are performed on data stored in non-volatile solid-state memory. A controller may be configured to maintain a list of physical memory locations, the list sorted by a least recently used criterion. The controller may select a first entry from a top of the list and perform a refresh operation to copy data stored in a current physical memory location associated with the first entry to a new physical memory location, and may remove the first entry from the top of the list and add a new entry associated with the new physical memory location to a bottom of the list. The controller may repeat the select, perform, remove and add steps for a plurality of entries in the list, and the steps may be timed such that all refresh operations are performed for all of the plurality of entries within a set period of time.

System and method for performing data retention in solid-state memory using an LRU list

A non-volatile semiconductor memory is disclosed comprising a memory device having a memory array including a plurality of memory segments. A plurality of sequential access write commands and random access write commands are received from a host, wherein each write command identifies at least one logical block address (LBA). The LBAs for the sequential access write commands are mapped to a plurality of the memory segments to generate sequential mapping data, and the sequential mapping data is mapped to a first one of the zones. The LBAs for the random access write commands are mapped to a plurality of the memory segments to generate random mapping data, and the random mapping data is mapped to a second one of the zones.

Non-volatile semiconductor memory segregating sequential, random, and system data to reduce garbage collection for page based mapping

Embodiments of the invention are directed to enabling concurrent commands from command requesters in a non-volatile solid-state storage subsystem in a manner that reduces contentions among the commands. Embodiments group blocks of memory into multiple sets of superblocks and associate a command requester to each superblock set. In one embodiment, the superblock sets are dynamically associated with a requester. In one embodiment, the superblock sets are dynamically associated with requesters based in part on at least one of internal memory management needs and host command throughput. In one embodiment, an erase command is executed on a superblock within a set and a simultaneous write command is executed on a superblock within another set.

System and method for reducing contentions in solid-state memory access

Systems and methods for data retention manager in a solid state storage system utilizing temperature measurement mechanisms are disclosed. Background data scanning can provide an efficient way to monitor data health and can be used to determine whether data refreshing is needed or to prevent data retention from degrading beyond error correction capabilities. In certain embodiments, data scanning may be performed as a background process regularly, for example, every month. However, effects of temperature on data retention may not be adequately accounted for using such methods. Certain embodiments disclosed herein provide a numerical integral method for taking account the system temperature by using the acceleration factor for data retention. Embodiments disclosed herein may provide for accurate handling of data retention in view of complex device temperature history.

Data retention monitoring using temperature history in solid state drives

Systems and methods are disclosed for recovering from a data access error encountered in data stripes implemented in a data redundancy scheme (e.g., RAID) in a solid state storage device. In one embodiment, the storage device holds parity data in a temporary, volatile memory such as a RAM and writes the parity data to the non-volatile memory when a full stripe's worth of new write data has been written to the non-volatile memory. In one embodiment, upon detecting that a data access error has occurred in a partially written stripe, the storage device initiates a write of the parity data for the partially written stripe to the non-volatile memory and executes a RAID recovery procedure using the newly written parity data to attempt to recover from the detected error. This approach allows for a recovery from the data access error without waiting for the full stripe to be written.

System and method for data error recovery in a solid state subsystem

Embodiments of the invention are directed to systems and methods for optimizing handling of data access requests. In one embodiment, a data storage device including non-volatile memory and magnetic media includes a controller that defers writing data to the magnetic media by first writing to the non-volatile memory and reporting to the host a write complete status. However, in cases where the non-volatile memory includes Multi-Level Cell (MLC) memory, if the write data is to be written to an upper page of an MLC cell, a backup power source such as a capacitor may be needed to avoid the paired page corruption problem. Embodiments of the invention avoid the problem without the use of a backup power source by writing deferred write data to a portion of the MLC memory that is operating in Single-Level Cell (SLC) mode, i.e., only the lower pages of the memory cells are written.

Systems and methods for handling write data access requests in data storage devices

A hybrid drive is disclosed comprising a head actuated over a disk comprising a plurality of data tracks, and a non-volatile semiconductor memory (NVSM) comprising a plurality of memory segments. When a life remaining of the NVSM falls below a threshold, the NVSM is marked as read only. When a write command is received from a host including write data, and when the NVSM is marked as read only, the write data is written to the disk and a corresponding memory segment in the NVSM is invalidated.

Hybrid drive converting non-volatile semiconductor memory to read only based on life remaining

Systems and methods for retaining data in non-volatile solid-state memory are disclosed in which refresh copy operations are performed on data stored in non-volatile solid-state memory. A controller can comprise a data retention module configured to issue copy commands within different periods of time and to maintain usage data on a storage subsystem. A refresh copy operation helps ensure that data written to memory retain integrity by causing data to be programmed again onto the memory. Execution of refresh copy commands may be prioritized over other commands based on a remaining length of time. One or more data structures may be used to determine memory blocks that require refresh copy operations. In one embodiment, a validity bit array is used to track blocks that contain valid data. In another embodiment, a least recently used list is used to track blocks that have been least recently written.

System and method for performing data retention in solid-state memory utilizing copy commands and usage data

In one embodiment of the invention, a flash-based/solid-state storage system with an implemented data redundancy scheme such as RAID is configured to hold parity data in a volatile memory such as RAM and write such parity data to the non-volatile flash media when a full stripe of data has been written to the media. Other embodiments in certain situations force an early write of the parity for a partial stripe that has not been fully written to the non-volatile media. Those situations may include a data access error on data in a partial stripe and a detected power loss event with a partial stripe present. Embodiments are directed to writing additional data with the parity data for the partial stripe and then later using the additional data in data recovery. This approach allows the controller to easily detect the presence of a partial stripe and handle such a stripe accordingly.

System and method for improving a data redundancy scheme in a solid state subsystem with additional metadata

A hybrid drive is disclosed comprising a head actuated over a disk comprising a plurality of data tracks, and a non-volatile semiconductor memory (NVSM). An access command is received from a host, the access command identifying at least one target logical block address (LBA). When the target LBA is mapped to a target data track on the disk, the head is positioned over the target data track and an accumulated access time is updated for the target LBA. The accumulated access time is compared to a first threshold, and the target LBA is migrated to the NVSM in response to the comparison.

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Fremont, CA, United States of America

Mei-Man L Syu