International Business Machines Corporation

Canon Kabushiki Kaisha

International Business Machines Corporporation

Mehul N Patel

Edward Brian Fletcher

David S Levitan

Nicholas R Orzol

Brian William Thompto

Albert James Van Norstrand, Jr

Dung Q Nguyen

Balaram Sinharoy

Brian David Barrick

Richard James Eickemeyer

Susan Elizabeth Eisen

Phillip G Williams

John Barry Griswell, Jr

Amir Tavakkoli Kermani Ghariehali

Eula A Tolentino

Akash V Giri

Ophir Erez

Michael Joseph Genden

Seth J Bamesberger

James W Irving

Tharunachalam Pindicura

Ahmed M Hussein

Alireza Aghili

Teresa Perez Estrada

Kent Li

Kathryn Brenda Bean

Nir Segev

A computer system, processor, programming instructions and/or method for balancing the workload of processing pipelines that includes an execution slice, the execution slice comprising at least two processing pipelines having one or more execution units for processing instructions, wherein at least a first processing pipeline and a second processing pipeline are capable of executing a first instruction type; and an instruction decode unit for decoding instructions to determine which of the first processing pipeline or the second processing pipeline to execute the first instruction type. The processor configured to calculate at least one of a workload group consisting of: the first processing pipeline workload, the second processing pipeline workload, and combinations thereof; and select the first processing pipeline or the second processing pipeline to execute the first instruction type based upon at least one of the workload group.

Routing instructions in a microprocessor

Systems for shaping a film by: depositing a formable material on a field of a substrate; and positioning a template relative to the field. The template has a mesa with a shaping surface and mesa sidewalls surround the shaping surface. The shaping may further comprise contacting the formable material with the shaping surface. The formable material may spread when the shaping surface is in contact with the formable material. The shaping may comprise exposing the formable material to a curing dose of actinic radiation after the formable material has spread to the edge of the field. A spatial distribution of the curing dose may be such that an interior dose applied at an interior of the field may be greater than a sidewall dose that is incident on the mesa sidewalls.

Frame curing system for extrusion control

A base drop pattern (BDP) is generated based on at least one of input parameters. A segment required compensation volume (RCV) of edge segments near edges of the imprint field is estimated. Edge drop arrangements at the edge segments are generated based on the estimated segment RCV and a guide command from a user.

Generating edge adjusted drop patterns

A method of performing instructions in a computer processor architecture includes determining that a load instruction is being dispatched. Destination related data of the load instruction is written into a mapper of the architecture. A determination that a compare immediate instruction is being dispatched is made. A determination that a branch conditional instruction is being dispatched is made. The branch conditional instruction is configured to wait until the load instruction produces a result before the branch conditional instruction issues and executes. The branch conditional instruction skips waiting for a finish of the compare immediate instruction.

Dependency skipping in a load-compare-jump sequence of instructions by incorporating compare functionality into the jump instruction and auto-finishing the compare instruction

A formable material in contact with a template is irradiated to form a reference film using a predefined registration pattern associated with a spatial light modulator (SLM). The reference film is inspected to generate positional information of elements of the SLM relative to an imprint field edge. Positional offset of the elements of the SLM with respect to a holder of the template based on the positional information is determined. Control parameters for the SLM are determined based on the positional offset.

Method and apparatus to register template with spatial light modulator

A computer processor includes a dispatch stage and a dependency skipping execution unit. The dispatch stage is configured to dispatch a plurality of instructions that include a general purpose instruction configured to produce first data, a dependent instruction configured to produce second data, and an indirect dependent instruction configured to produce third data. The dependency skipping execution unit is configured to monitor the plurality of instructions and to process the indirect dependent instruction in response to the general purpose instruction producing the first data. The indirect dependent instruction is issued independently from the second data produced by the indirect dependent instruction.

Dependency skipping execution

Systems and methods for shaping a film by: depositing a formable material on a field of a substrate; and positioning a template relative to the field. The template has a mesa with a shaping surface and mesa sidewalls surround the shaping surface. The shaping may further comprise contacting the formable material with the shaping surface. The formable material may spread when the shaping surface is in contact with the formable material. The shaping may comprise exposing the formable material to a curing dose of actinic radiation after the formable material has spread to the edge of the field. A spatial distribution of the curing dose may be such that an interior dose applied at an interior of the field may be greater than a sidewall dose that is incident on the mesa sidewalls.

Frame curing method for extrusion control

Systems and processes for analyzing an image. Analyzing the image may comprise selecting a computer vision parameter for an image feature identification process. The image feature identification process may identify at least one feature in the image when using the computer vision parameter. Analyzing the image may further comprise segmenting the image into a region of interest T and a background region B. Analyzing the image may further comprise calculating a set of statistical values about the region of interest T of the image. Analyzing the image may further comprise classifying the image based on both the computer vision parameter and the set of statistical values as one of either: a defect containing image or a defect free image.

Systems and methods for classifying images of an imprinted film

Devices, systems, and methods position a template for imprinting a formable material over one or more gas-flow channels on a stage, wherein the template includes a patterning surface, a mesa, and at least one mesa sidewall; and direct a gas flow through the one or more gas-flow channels toward a portion of the at least one mesa sidewall.

System and method for cleaning mesa sidewalls

A method, a system, and a controller for imprinting. Apply droplets of a formable material to imprint region of substrate. A partial pressure of formable material develops at a fluid-gas interface. A portion of an imprinting surface of a mesa on a template at an initial contact time is brought into contact with the droplets. The droplets merge and flow towards an imprint edge interface. A first gas flows in the imprint region prior to the initial contact time. A second gas flows into the imprint edge interface and region between the template and the substrate after the initial contact time. The template and the flow of the second gas reduces the partial pressure of the formable material below a vapor pressure of the formable material in a portion of the gap region adjacent to the fluid-gas interface at the imprint edge interface.

Imprinting method and apparatus

Executing system call vectored (SCV) instructions in a multi-slice processor including receiving, by an instruction fetch unit, a SCV instruction, wherein the SCV instruction is a system call from an operating system; sending the SCV instruction to a branch issue queue; determining, by the branch issue queue, that the SCV instruction is next-to-complete; issuing the SCV instruction to a branch resolution unit; and executing the SCV instruction by the branch resolution unit.

Executing system call vectored instructions in a multi-slice processor

Methods and apparatus for generating a mask vector for determining a processor instruction address using an instruction tag (ITAG) in a multi-slice processor including receiving a first ITAG value and an interrupt ITAG value; generating the mask vector divided into mask sections comprising a plurality of elements with unset flags; for each mask section: if the mask section comprises the first ITAG value, setting a flag of an element in the mask section corresponding to the first ITAG value; if the mask section comprises the interrupt ITAG value, setting a flag of an element in the mask section corresponding to the interrupt ITAG value; setting each flag of each element in the mask vector between the element in the mask vector corresponding to the first ITAG value and the element in the mask vector corresponding to the interrupt ITAG value; and providing the mask vector to an instruction fetch unit.

Generating a mask vector for determining a processor instruction address using an instruction tag in a multi-slice processor

Methods and apparatus for identifying an effective address (EA) using an interrupt instruction tag (ITAG) in a multi-slice processor including receiving, by an instruction fetch unit of the processor, the interrupt ITAG; retrieving an effective address table (EAT) row from an EAT, wherein the EAT row comprises a range of EAs and a first ITAG of a range of ITAGs; accessing a processor instruction vector comprising a plurality of elements, each element corresponding to one of a plurality of ITAGs; applying a mask to the processor instruction vector to obtain a portion of the processor instruction vector that begins with an element corresponding to the first ITAG and is defined by an element corresponding to the interrupt ITAG; calculating an EA offset; and identifying the EA for the interrupt ITAG using the EA offset and the range of EAs in the retrieved EAT row.

Identifying an effective address (EA) using an interrupt instruction tag (ITAG) in a multi-slice processor

Methods and apparatus for managing an effective address table (EAT) in a multi-slice processor including receiving, from an instruction sequence unit, a next-to-complete instruction tag (ITAG); obtaining, from the EAT, a first ITAG from a tail-plus-one EAT row, wherein the EAT comprises a tail EAT row that precedes the tail-plus-one EAT row; determining, based on a comparison of the next-to-complete ITAG and the first ITAG, that the tail EAT row has completed; and retiring the tail EAT row based on the determination.

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Austin, TX, United States of America

Mehul N Patel