Intersil Americas Inc.

Renesas Electronics America Inc.

Mehul Dilip Shah

Eric Magne Solie

Sungkeun Lim

Michael Jason Houston

Lei Zhao

Steven Patrick Laur

M Jason Houston

Jia Wei

Wei Dong

Zhigang Liang

Bin Li

Chun Cheung

Paul K Sferrazza

Yen-Mo Chen

Aaron Shreeve

Warren E Schroeder

John H Carpenter, Jr

Byongho Park

Akshat Shenoy

Minghua Li

Ryan Foran

Methods and systems for operating a multiphase voltage regulator are described. The multiphase voltage regulator can include a plurality of power stages. A controller can be connected to the plurality of power stages. The controller can detect a number of activated power stages among the plurality of power stages. The controller can adjust a gain of a current sense feedback loop of the controller to control a load-transient response of the multiphase voltage regulator. The adjustment to the gain can be based on the number of activated power stages.

Multiphase voltage regulator variable phase control stability

Systems, apparatuses, and methods for charging a bootstrap capacitor of a device during low power states are described. In an example, an apparatus can include a controller configured to enable a low power state of the device. The device can include a high side switching element and a low side switching element. The controller can, in response to the low power state of the device being enabled, operate the low side switching element of the device to charge the bootstrap capacitor of the device. The controller can, in response to the low power state of the device being enabled and a level of a control signal being a first level, activate the low side switching element to charge the bootstrap capacitor of the device.

Boot capacitor charge during low power states

Exemplary embodiments may include a device with an input power component, a system supply component, an inductive charger component operatively coupled to the input component and the system component, and a direct charger component operatively coupled to the inductive charger and the system component. Exemplary embodiments may further include an input node of the inductive charger component and an input node of the direct charger component operatively coupled to an output node of the input power component at a first device node. Exemplary embodiments may also include a method of receiving an input power signal, obtaining a charging condition, entering a first charging state, in accordance with the obtained charging condition satisfying a first charging condition, and entering a second charging state, in accordance with the obtained charging condition satisfying a second charging condition.

Inductive charger apparatus with multiple charging paths and method for charging therewith

Example implementations include obtaining charging power from a power source, obtaining a charging command, activating a trickle current to a battery, entering a first charging state in response to a condition that a voltage of the battery does not satisfy a deep discharge threshold, and entering a second charging state in response to a condition that a voltage of the battery satisfies a deep discharge threshold. Example implementations can further include supplying the trickle current in a burst to the battery in response to a condition that the voltage of the battery does not satisfy a fuel gauge threshold, upon entering the second charging state. Example implementations can further include supplying the trickle current continuously to the battery in response to a condition that the voltage of the battery satisfies the fuel gauge threshold, upon entering the second charging state.

Device and method for charging a battery discharged beyond at least one operating threshold

An apparatus including a proportional gain circuit, an integral gain circuit, a limit circuit, a gain booster circuit and a combiner. The gain circuits apply a proportional gain and an integral gain to an error signal, and the combiner combines both gained error signals to provide a control signal. The limit circuit applies a limit function that limits the proportional gain to a magnitude. The gain booster circuit increases gain while the limit function is being applied. The increased gain may be applied to only the integral gain, or to both the integral and proportional gains such as by boosting gain of the error signal. The apparatus may be a regulator that may include multiple control loops providing multiple error signals, in which a mode selector selects one of the error signals to control regulation. The limit function increases stability while the boosted gain improves transient response during mode transitions.

Regulator with high speed nonlinear compensation

The present embodiments are directed to methods and apparatuses for operating a battery charger in computing systems having certain system load requirements, battery configurations and external device power supply support. According to some aspects, the present embodiments provide methods and apparatuses for providing a reverse boost mode of operation when the battery charger is providing system power from a battery, such as when an adapter is not connected. The reverse boost mode of operation according to embodiments provides a regulated output voltage, thereby allowing a load such as a CPU to operate at maximum performance, even when the battery has discharged below a threshold discharge level.

System and method for providing reverse boost mode in battery charger application

One or more embodiments are directed to a multiport power delivery architecture that reduces the cost and maximizes the power utilization. According to some aspects, an adapter power add-up feature of the embodiments can combine the power of two or more adapters. The total power can be used to support CPU Turbo events and Quick Charge function. In one aspect, one charger operates as voltage source or current source and the other(s) as current source(s). When the system demand is high enough for all chargers may operate as current sources, the battery will supply the rest of the system demand. The proposed implementation of adapter power add-up feature can enable simple control scheme. Customers can set up BGATE control priorities to determine which charger to handle the BGATE control.

Adapter power add-up feature for multiport systems

According to certain aspects, the present embodiments are related to systems and methods providing an autonomous adapter pass through mode in a battery charger. For example, when an adapter is connected to the battery charger, but the system is idling, embodiments allow for power from the adapter to be directly coupled to the battery charger output, and main switching to be stopped, thereby dramatically reducing battery charger current consumption. These and other embodiments provide various circuitry and techniques to ensure that the battery is protected in this mode. According to further aspects, the present embodiments provide for the charger itself to autonomously enter and exit the adapter pass through mode, thereby eliminating the need for excessive processing overhead in components external to the battery charger.

Autonomous adapter pass through mode for buck-boost battery charger

An electronic system, a multiple charger configuration, and method of operating a multiple input, multiple charger configuration are disclosed. For example, a multiple charger configuration is disclosed, which includes a first battery charger circuit configured to receive to a first input voltage, and a second battery charger circuit configured to receive a second input voltage. A first switching transistor is coupled to an output of the first battery charger circuit, a system voltage output terminal, and a battery terminal configured to connect to a battery stack or at least one battery cell. A second switching transistor is coupled to an output of the second battery charger circuit and the battery terminal. Thus, the multiple chargers can be utilized in one system to charge or discharge a battery stack or at least one battery cell and thereby deliver power for a battery-operated system, product or device.

Multiple chargers configuration in one system

A method to soft start a charge pump circuit according to embodiments includes enabling switching for a plurality of power transistors, selecting a first switching control signal from a plurality of switching control signals for the selected plurality of power transistors, slowly ramping up a plurality of bootstrap supply voltages associated with the selected plurality of power transistors, driving a gate-to-source voltage of each power transistor of the selected plurality of power transistors at a first predefined level, and determining if the plurality of bootstrap supply voltages are less than a second predefined level. If the plurality of bootstrap supply voltages are less than the second predefined level, the method further includes toggling and thereby selecting a second switching control signal from the plurality of switching control signals for a second selected plurality of power transistors.

Method and circuitry to soft start high power charge pumps

According to certain aspects, the present embodiments are based on an improved switched-capacitor (SC) converter topology that typically does not include an inductor. In particular, the topology includes a ladder SC circuit configured as a cap divider. The cap divider can be used to provide an unregulated output voltage Vout that is a certain fraction (e.g. 2) of input voltage Vin, such as Vin/2 (i.e., duty cycle&#x2248;50%). In some embodiments of a PWM control scheme for this topology, the PWM OFF pulse is free running, determined by the logic combination of timer and VOUT comparator. The PWM OFF pulse width is measured and used as the reference for a minimum PWM ON timer. The PWM ON pulse is therefore forced to be at least a minimum width that is proportional to the PWM OFF pulse. A UVOV protection window can be added to ignore the minimum PWM ON timer during a load transient.

PWM control scheme for providing minimum on time

An electronic device that determines an adapter current limit for a power adapter, including a regulator, a voltage comparator, and a controller. The regulator regulates an adapter output current level to prevent it from exceeding the adapter current limit, and provides a regulation signal during regulation. The voltage comparator provides an under-voltage signal when adapter output voltage level falls below a low voltage threshold. The controller initially sets the adapter current limit at a lowest level, increases the adapter current limit by an incremental amount when the regulation signal is provided, and when the under-voltage signal is provided, decreases the adapter current limit by the incremental amount to determine a final adapter current limit. The final adapter current limit is at or near the actual maximum current limit of the power adapter. The adapter current limit may be increased only when regulation occurs for at least a predetermined time period.

System and method for determining adapter current limit

Multiple characteristics of a DC-DC converter, such as its mode of operation (e.g., either forced continuous conduction mode, or discontinuous conduction mode), and an operational parameter (such as the dead-time between switching times of the output switching devices (upper and lower MOSFETs) of the converter, whose associated driver integrated circuit has a pin usage that leaves only a single pin available for auxiliary purposes, are programmed by a single pin-based digital and analog information extracting circuit that couples both digital information and analog information within the same control signal to the driver IC by way of only the one available pin.

Circuit for multiplexing digital and analog information via single pin of driver for switched MOSFETs of DC-DC converter

Multiple characteristics of a DC-DC converter, such as its mode of operation (e.g., either forced continuous conduction mode, or discontinuous conduction mode), and an operational parameter (such as the dead-time between switching times of the output switching devices (upper and lower MOSFETs) of the converter, whose associated driver integrated circuit has a pin usage that leaves only a single pin available for auxiliary purposes, are programmed by a single pin-based digital and analog information multiplexing circuit that couples both digital information and analog information within the same control signal to the driver IC by way of only the one available pin.

Growing community of inventors

Morrisville, NC, United States of America

Mehul Dilip Shah