Denso Corporation

Nippondenso Co., Ltd.

Kabushiki Kaisha Toyota Chuo Kenkyusho

Denso Corpora Tion

Megumi Suzuki

Akiyoshi Asai

Teruhisa Akashi

Jun Sakakibara

Takahiko Yoshida

Yukihiro Takeuchi

Motohiro Fujiyoshi

Hiroyuki Wado

Yoshiteru Omura

Akihiko Teshigahara

Seiji Fujino

Kazuhiro Tsuruta

Takao Iwaki

Tomoya Jomori

Takashi Ozaki

Katsuaki Goto

Tomoki Tanemura

Yasuo Yamamoto

A method for manufacturing an element forming wafer includes the steps of: forming a thin layer on a semiconductor wafer having a plurality of chip forming regions; and adjusting stress generated in an element forming portion of the thin layer to have a specified value. The thin layer constitutes an element in each of the plurality of chip forming regions. The step of adjusting the stress includes: arranging a resist on the thin layer; exposing the resist to light using a photomask having openings; forming openings in the resist by developing the resist; and performing ion-implantation using the resist as a mask. The photomask used during the step of exposing the resist to light has a ratio of the openings that is adjusted based on the stress generated in the element forming portion.

Element forming wafer and method for manufacturing the same

A recess is formed in one silicon substrate. A silicon oxide film is formed in another one silicon substrate at a portion space apart from a space-to-be-formed region. The silicon oxide film has a groove surrounding the space-to-be-formed region and extending to an outer periphery of the other one silicon substrate. Further, the other one silicon substrate and the one silicon substrate are directly bonded to each other via the silicon oxide film so as to cover the groove. A gas discharge passage, a stacking structure of the silicon substrates and the silicon oxide film are formed, and the space is formed inside the stacking structure by the recess. Then, by the heat treatment, the gas inside the space is discharged to the outside of the stacking structure through the gas discharge passage.

Semiconductor device and method for manufacturing the same

A vibration gyroscope includes: a mass part supported to be displaceable in a first direction and a second direction; an exciter vibrating the mass part in the first direction; and a detector detecting a displacement amount of the mass part in the second direction. The first direction and the second direction are orthogonal to each other. A resonance frequency of the mass part in the first direction coincides with a resonance frequency of the mass part in the second direction. A Q-factor of vibration of the mass part in the second direction is smaller than a Q-factor of vibration of the mass part in the first direction.

Vibration gyroscope

In a semiconductor device, a first substrate and a second substrate are bonded to each other through an insulating film. A hermetically sealed chamber is provided between the first substrate and the second substrate, and a sensing part is enclosed in the hermetically sealed chamber. The second substrate has a through hole penetrating in a stacking direction of the first substrate and the second substrate and exposing the first surface of the first substrate. A penetrating electrode is disposed on a wall surface of the through hole of the second substrate, and is electrically connected to the sensing part. A discharge path is provided, at a position located between the hermetically sealed chamber and the through hole for releasing outgas generated during bonding from the hermetically sealed chamber to the through hole.

Semiconductor device with discharge path, and method for producing the same

A Fabry-Perot interferometer includes a fixed mirror structure and a movable mirror structure. The fixed mirror structure has a fixed mirror in a spectral region. The movable mirror structure includes a membrane spaced from the fixed mirror structure. The membrane has a movable mirror in the spectral region and multiple springs arranged one inside the other around the spectral region. A spring constant of the inner spring is less than a spring constant of the outer spring. One of the fixed mirror structure and the membrane has multiple electrodes, and the other of the fixed mirror structure and the membrane has at least one electrode that is paired with the electrodes to form opposing electrode pairs arranged one inside the other around the spectral region. The number of the opposing electrode pairs is equal to the number of the springs.

Fabry-perot interferometer having an increased spectral band

An optical multilayer mirror of a Fabry-Perot interferometer includes a reinforcing section provided as a side wall of each of second and fourth high refractive-index layers. The reinforcing section is configured to support a portion of each of the second and fourth high refractive-index layers covering a top surface of each of first and second low refractive-index layers and reach first and third high refractive-index layers via each of the first and second low refractive-index layers, respectively. Even when the first and second low refractive-index layers lack a mechanical strength with a high n ratio achieved by selecting materials for the first through fourth high refractive-index layers and the first and second low refractive-index layers, the reinforcing section helps prevent the second and fourth high refractive-index layers from being bent. The optical multilayer mirror thus features a wide high-reflectance band.

Optical multilayer mirror and fabry-perot interferometer having the same

A semiconductor integrated circuit device having an SOI structure is capable of preventing occurrence of leak current flowing from a diffusion layer even when a semiconductor element having a pn-junction is included in the semiconductor substrate. The semiconductor integrated circuit device having the SOI structure is formed with a semiconductor layer, or SOI layer, on a p-type semiconductor substrate through a buried insulating film and further with semiconductor circuit elements serving as functional elements at the SOI layer thus formed. As a protection transistor to protect the semiconductor circuit elements, a MOSFET may be formed in which n-type diffusion layers are formed in the semiconductor substrate. The n-type diffusion layers of the MOSFET are to be surrounded by p-type diffusion layers more highly doped than the semiconductor substrate.

Semiconductor integrated circuit device and manufacturing method for the

In a semiconductor integrated circuit device having an input protection circuit element such as a diode formed in the semiconductor substrate, the leak current is suppressed. An nMOS transistor and a pMOS transistor that constitute a CMOS inverter circuit are formed using a SOI structure. An n-type diffusion layer and p-type diffusion layer are formed within the semiconductor substrate to thereby construct a protective diode that forms an input protection circuit for the CMOS inverter circuit. By surrounding the outer periphery of the n-type diffusion layer with the p-type diffusion layer, the depletion layer that is formed at an interface between the semiconductor substrate and a buried insulation film therein is cut off by the p-type diffusion layer, thereby suppressing the leak current between the n-type diffusion layer and the p-type diffusion layer.

Semiconductor integrated circuit device

A semiconductor device of SOI structure formed by the mesa isolation method, which can sufficiently reduce the wiring capacitance even if the width of the isolation trench is large. An SOI layer which constitutes an element region is formed by forming a buried oxide film in a silicon substrate, forming an isolation trench in the buried oxide film and burying an isolating material in the isolation trench. By the formation of the SOI layer with the isolating material, a dummy SOI layer is formed in a field part other than the element region. Then, by the formation of a MOSFET gate wiring on the dummy SOI layer, the wiring capacitance is reduced. Furthermore, the dummy SOI layer is completely depleted when the MOSFET threshold value is applied to the gate wiring.

Growing community of inventors

Kariya, Japan

Megumi Suzuki