Intel Corporation

Meenakshisundaram Chinthamani

Phanindra Mannava

Hari K Nagpal

R Guru Prasadh

Rajat Agarwal

Robert J Safranek

Kai Cheng

Bahaa Fahim

Keith Robert Pflederer

Malcolm Mandviwalla

Avinash Sodani

Sandeep Ahuja

Darrell S McGinnis

Timothy Y Kam

C Scott Huddleston

Jinho Suh

Disclosed herein is a computing device configured to implement thermal throttling of a component of the computing device. The computing device includes an electronic component and a temperature sensor thermally coupled to the electronic component. The computing device also includes a thermal management controller to receive a temperature measurement from the temperature sensor and generate a throttling factor for the electronic component. If the temperature measurement is greater than a specified threshold, the throttling factor is to reduce performance of the electronic component to be at least the performance guarantee for the electronic component.

Thermal throttling of electronic devices

Methods and apparatus relating to ring protocols and techniques are described. In one embodiment, a first agent generates a request to write to a cache line of a cache over a first ring of a computing platform. A second agent that receives the write request forwards it to a third agent over the first ring of the computing platform. In turn, a third agent (e.g., a home agent) receives data corresponding to the write request over a second, different ring of the computing platform and writes the data to the cache. Other embodiments are also disclosed.

Optimized ring protocols and techniques

In one embodiment, the present invention includes a processor that can generate data packets for transmission to an agent, where the processor can generate a data packet having a command portion including a first operation code to encode a transaction type for the data packet and a second operation code to encode a processor-specific operation. This second operation code can encode many different features such as an indication that the data packet is of a smaller size than a standard packet, in order to reduce bandwidth. This operation code can also identify an operation to be performed by a destination agent coupled to the agent. Other embodiments are described and claimed.

Reducing packet size in a communication protocol

A dynamic random access memory (DRAM) is operated as a cache memory coupled with a processor core. A block of data is transmitted to the DRAM as even and odd pairs of bits from the processor core. The block of data includes N error correcting code (ECC) bits and 11*N data bits. Two or more cache lines are to be stored in a memory page with tag bits aggregated together within the page.

Mechanisms and techniques for providing cache tags in dynamic random access memory

Generating a packet including multiple operation codes

In an embodiment, a method is provided. The method of this embodiment provides receiving a request for data from a processor of a plurality of processors, determining a cache entry location based, at least in part, on the request, storing the data in a cache corresponding to the processor at the cache entry location, and storing a coherency record corresponding to the data in an affinity corresponding to the cache.

Line swapping scheme to reduce back invalidations in a snoop filter

In an embodiment, a method is provided. The method of this embodiment provides receiving a request for data from a processor of a plurality of processors, determining a cache entry location based, at least in part, on the request, storing the data in a cache corresponding to the processor at the cache entry location, and storing a coherency record corresponding to the data in a snoop filter in accordance with one of the following, if there is a cache miss: at the cache entry location of a corresponding affinity in the snoop filter if the cache entry location is found in the corresponding affinity, or at a derived cache entry location of the corresponding affinity if the cache entry location is not found in the corresponding affinity.

Partial way hint line replacement algorithm for a snoop filter

Growing community of inventors

Hillsboro, OR, United States of America

Meenakshisundaram Chinthamani