Intel Corporation

Meenakshisundara R Chinthamani

Ravishankar Iyer

Robert S Chappell

Li Zhao

Zhen Fang

Ryan Carlson

Milind B Kamble

Seung Eun Lee

Methods and apparatus to provide for power consumption reduction in memories (such as cache memories) are described. In one embodiment, a virtual tag is used to determine whether to access a cache way. The virtual tag access and comparison may be performed earlier in the read pipeline than the actual tag access or comparison. In another embodiment, a speculative way hit may be used based on pre-ECC partial tag match to wake up a subset of data arrays. Other embodiments are also described.

Cache memory power reduction techniques

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Hillsboro, OR, United States of America

Meenakshisundara R Chinthamani