The Royal Institution for the Advancement of Learning / Mcgill University

Transfert Plus, Societe En Commandite

Scuola Superiore Santanna

Md Shafiqul Hai

Odile Liboiron-Ladouceur

Piero Castoldi

Michael Menard

Nicola Andriolli

Pier Giorgio Raponi

Isabella Cerutti

Monireh Moayedi Pour Fard

Meer Sakib

Chunshu Zhang

As photonics evolves closer and closer to the electronic processing elements in order to meet the demands of speed, latency of evolving data communications networks and data centers the inventors, rather than seeking direct monolithically integrated CMOS based processing photonic and electronic elements, have established a different route. Namely replace the computer hubs/electrical bridges interconnecting the multiple core logic chipset elements with a photonic bridge. In this manner high risk chip-to-chip photonic point-to-point links are replaced with photonic SOCs that leverage photonics bandwidth density attribute rather than its bandwidth distance attributes. An SOI based Electronic Embedded Photonic Switching Fabric is presented supporting, for example, N&#xd7;MGb/s interconnections exploiting N channels of MGb/s wherein each channel of exploits S WDM channels of TGb/s. Embodiments of the invention also support high density optical interconnection via vertical grating couplers and multicore fibers.

Methods and systems for board level photonic bridges

Photonic integration has primarily sought to exploit optical parallelism through wavelength division multiplexing whilst in many instances 'brute-force' time division multiplexing offers benefits through reduced complexity and cost. However, photoreceivers are primarily the same now for operation at 10 Gb/s, 20 Gb/s, 40 Gb/s and above as 20 or 25 years ago and exploit the same optical detection&#x2014;amplification&#x2014;logic processing design. However, high speed low cost electronics ca be leveraged in conjunction with optical time sampling and logic to provide a new design paradigm. An incoming XGbsoptical data stream is sampled and processed by N photodetectors each operating at (X/N)Gbsrather than the current direct XGbsfront-end of the prior art. Flexibility for the designer in establishing N within optical layer constraints, electronics capabilities etc. allows for further cost&#x2014;power&#x2014;complexity&#x2014;performance tradeoffs to be established in different systems such that high capacity TDM links can exploit direct CMOS integrated optoelectronic front-ends.

Time sampled photodetector devices and methods

Scalability and energy efficiency are key issues in data centers imposing tight constraints on the networking infrastructure connecting the servers. Optical interconnection mitigates electronic limitations but the additional flexibility offered by WDM and datarate across a data center interconnection network requires architectural design, photonic technologies, and operating strategies be selected and optimized to meet power consumption requirements. Multi-plane architectures based upon space-wavelength domain architectures have been proposed to overcome scalability limitations. It would be beneficial to extend space and time switching domains with the wavelength domain for additional capacity to increase throughput as well as providing same electro-optic interface. Accordingly, the inventors have established space-time domain interconnection network architectures with wavelength domain overlay overcoming power consumption issues, especially at low utilization, by exploiting all-optical implementations with active elements which act simultaneously as a switch and an amplifier, and the possibility to remain in an idle state when unused.

Methods and devices for space-time multi-plane optical networks

Growing community of inventors

Montreal, Canada

Md Shafiqul Hai