Qualcomm Incorporated

Other

Leland Stanford Junior University

Mazhareddin Taghivand

Alireza Khalili

Jeongsik Yang

Yashar Rajavi

Mohammad Emadi

Sang-Oh Lee

Mohammad Mahdi Ghahramani

Haim Mendel Weissman

Amirpouya Kavousian

Niranjan Anand Talwalkar

Jafar Savoj

Mohammad Bagher Vahid Far

Abbas Komijani

Ada Shuk Yan Poon

Tao Li

Yann Ly-Gagnon

Roger Brockenbrough

Young Gon Kim

Danial Ehyaie

Gregory C Steele

Soheil Golara

Rainer Gaethke

Yossef Tsfaty

Avigdor Brillant

Arvind Keerti

Tong Zhang

Yongwang Ding

Conor Donovan

Jianlei Shi

Seyed Hossein Miri Lavasani

Mingdeng Chen

Kamal Aggarwal

Damoun Nashtaali

Seyed Abolfazl Motahari

Babak Hossein Khalaj

Keplin Victor Johansen

Yossi Tsfati

Amir Hossein Masnadi Shirazi Nejad

Mojtaba Sharifzadeh

Afshin Babveyh

Mehrdad Mehrbod

Raviv Lior

Aspects of the present disclosure provide a low power differential frequency multiplier. An example frequency multiplier circuit generally includes a first set of transistors, a second set of transistors, and a resonant circuit. The first set of transistors comprises a first transistor and a second transistor, wherein each of the transistors in the first set is a first type of transistor. The second set of transistors comprises a third transistor and a fourth transistor, wherein each of the transistors in the second set is a second type of transistor. The resonant circuit has a first terminal coupled to the first set of transistors and a second terminal coupled to the second set of transistors, wherein the resonant circuit comprises an inductive element and a capacitive element coupled in parallel with the inductive element.

Radio frequency low power differential frequency multiplier

Certain aspects of the present disclosure provide methods and apparatus for reducing phase noise in voltage-controlled oscillators (VCOs). One example VCO generally includes a first resonant circuit comprising an inductor and a first variable capacitive element coupled in parallel with the inductor; and a second variable capacitive element coupled to a center tap of the inductor and further coupled to a reference voltage, wherein the center tap of the inductor is further coupled to a voltage source.

Phase noise reduction techniques for voltage-controlled oscillators (VCOs)

An integrated system for sequencing a string of oligo-nucleotides is disclosed, the system includes a sequencer for sequencing a plurality of fragments of the string of oligo-nucleotides via identifying oligo-nucleotides of the fragments one by one and a processor for processing the identified oligo-nucleotides to determine the sequence of the string of oligo-nucleotides and to stop the sequencer from sequencing redundant fragments, where the sequencer and the processor operate in a cycle for each oligo-nucleotide of the fragments.

DNA sequencing and processing

Certain aspects of the present disclosure generally relate to generating a large electrical resistance. One example circuit generally includes a first transistor having a gate, a source connected with a first node of the circuit, and a drain connected with a second node of the circuit. The circuit may also include a voltage-limiting device connected between the gate and the source of the first transistor, wherein the device, if forward biased, is configured to limit a gate-to-source voltage of the first transistor such that the first transistor operates in a sub-threshold region. The circuit may further include a second transistor configured to bias the voltage-limiting device with a current, wherein a drain of the second transistor is connected with the gate of the first transistor, a gate of the second transistor is connected with the first node, and a source of the second transistor is connected with an electric potential.

Subthreshold metal oxide semiconductor for large resistance

An apparatus can have a power supply circuit configured to receive, from an antenna, a first signal at a frequency exceeding a GHz, and including a rectifier circuit that is impedance matched to the antenna at the first frequency and that is configured to generate a supply voltage by rectifying the first signal at the first frequency. A signal generation circuit can be configured to use the supply voltage to generate a second signal at as higher frequency and to operate in two different power modes in response to a data signal. A transmitter circuit can be configured to use the supply voltage to create pulse at the higher frequency of the signal and in response to the data signal, and that includes an amplifier circuit configured to receive the data signal and provide an amplification of the data signal to the antenna.

Short range wireless communication

A linear low noise amplifier is disclosed. In at least one exemplary embodiment, the linear low noise amplifier may include a first metal oxide semiconductor field effect transistor (MOSFET) configured to operate in a triode mode coupled to a second MOSFET configured to operate in a saturation mode. Linearity of the low noise amplifier may be determined, at least in part, by a transconductance associated with the second MOSFET and a channel resistance associated the first MOSFET.

Linear low noise amplifier

A method for inductively coupled communication is described. The method includes generating a first signal. The first signal frequency is a first integer multiple of a carrier frequency for inductively coupled communication. The method also includes selecting between a standalone mode and a coexistence mode. The method further includes dividing the first signal to obtain a second signal when in standalone mode. The second signal frequency is a second integer multiple of the carrier frequency. The method additionally includes dividing the first signal to obtain a third signal when in coexistence mode. The third signal frequency is a third integer multiple of the carrier frequency. The method also includes generating an inductively coupled communication signal using at least one of the second signal and the third signal.

Systems and methods for reducing transmission interference

Various aspects of this disclosure describe switched-capacitor circuits in a PLL. Examples include routing current from a first current source through a capacitor to ground during a first clock phase, routing current from a second current source through the capacitor to ground during a second clock phase, and transferring charge on the capacitor to a loop filter capacitor during a third clock phase. The first current source may generate current responsive to UP error samples from a phase/frequency detector (PFD), and the second current source generates current responsive to DN error samples from the PFD.

Switched-capacitor circuits in a PLL

Systems and methods for interference cancellation in a receiver of wireless signals include receiving a signal comprising an aggressor and a desired signal. The received signal is amplified in a low noise amplifier (LNA) to generate an amplified received signal. The aggressor is extracted from the received signal in a feed-forward path between an input of the LNA and an output of the LNA, to generate an extracted aggressor and the extracted aggressor is subtracted from the amplified received signal to provide the desired signal. An amplify and rotate block in the feed-forward path is used to align a phase of the aggressor to a phase of the amplified received signal in order to enable the subtraction.

Feed-forward interference cancellation in a receiver

A two-walled coupled inductor includes an outer wall and an inner wall separated by a slit. The outer wall has a first width and the inner wall has a second width. The inner wall and the outer wall may be configured to be coupled to oscillator circuitry. The two-walled coupled inductor may include an electrically conductive stub coupled to the outer wall to be coupled to a power supply. A common mode current flows through the outer wall, and the stub if one is present, and a differential mode current flows through both the outer wall and the inner wall, but not the stub. The first and second widths, and dimensions of the stub, may be sized to increase an inductance of the common mode compared to an inductance of the differential mode, thereby reducing phase noise of the inductor-based resonator.

Coupled inductor-based resonator

Certain aspects of the present disclosure provide circuits for generating high accuracy millimeter wave or radio frequency (RF) wideband in-phase (I) and quadrature (Q) oscillating signals having acceptable amplitude and phase mismatch over process, voltage, and temperature (PVT) variations with reduced cost, area, and power consumption. In one example apparatus, a polyphase filter having a first stage and a second stage is provided. Each stage comprises resistive elements and capacitive elements. Certain aspects of the present disclosure provide for intentional resistive and/or capacitive value mismatch between the resistive or capacitive values of one or multiple stages such that the phase mismatch between the resulting I and Q signals may be reduced without degrading the amplitude mismatch. Certain aspects of the present disclosure provide for replacing the resistive elements in at least one stage with transistors operating in the triode region, where the on-resistance is controlled by a feedback network.

High accuracy millimeter wave/radio frequency wideband in-phase and quadrature generation

An example method for active load modulation includes determining a modulated portion and an unmodulated portion of a bit. Further, the example method includes during the modulated portion of the bit, holding a phase of a received carrier signal. In addition, the example method includes, during the unmodulated portion of the bit, synchronizing to the received carrier signal.

Active load modulation in near field communication

Differential crystal oscillator circuits are disclosed that may provide low-power, low phase noise operation, and prevent latching at low frequency by providing a low impedance DC path using active super diodes.

Stable differential crystal oscillator with active super diodes

A circuit includes: first and second output terminals; a reference resonator coupled between the first and second output terminals; a cross-coupled oscillation unit coupled to the first and second output terminals; a first MOSFET diode coupled to the cross-coupled oscillation unit, the first MOSFET diode including a first transistor, a first resistor coupled between gate and drain terminals of the first transistor, and a first capacitor; a second MOSFET diode coupled to the cross-coupled oscillation unit, the second MOSFET diode including a second transistor, a second resistor coupled between gate and drain terminals of the second transistor, and a second capacitor cross coupled between the drain terminal of the second transistor and the gate terminal of the first transistor, wherein the first capacitor is cross coupled between the drain terminal of the first transistor and the gate terminal of the second transistor.

Low-power balanced crystal oscillator

Techniques for providing transformer-based CMOS oscillators capable of operation with low voltage power supplies. In an exemplary embodiment, an LC tank is provided at the drains of a transistor pair, and the inductance of the LC tank is mutually magnetically coupled to an inductance between the gates of the transistor pair. A separate complementary transistor pair is also coupled to the LC tank. A further exemplary embodiment provides an LC tank at the gates of a transistor pair, as well as for three-way coupling amongst a tank inductance, an inductance between the gates of the transistor pair, and an inductance between the gates of a complementary transistor pair.

Transformer-based CMOS oscillators

Growing community of inventors

Campbell, CA, United States of America

Mazhareddin Taghivand