Apple Inc.

Mayur V Joshi

Ajay Bhatia

Mohamed Hassan Abu-Rahma

Shahzad Nazar

Yildiz Sinangil

Aravind Kandala

Bharan Giridhar

A compute-memory circuit included in a computer system includes multiple data storage cells and multiplier circuits. The data storage cells store weight values associated with a first operand. The multiplier circuits are coupled to a global bit line and receive the weight values via local bit lines coupled to the data storage cells. Using the received weight values and activation signals indicative of a second operand, the multiplier circuits modify a voltage level of the global bit line. The resultant voltage level on the global bit line is indicative of a product of the first and second operands, and can be converted to a digital value using an analog-to-digital converter circuit.

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San Carlos, CA, United States of America

Mayur V Joshi