Synopsys, Inc.

Mayur Bubna

Solaiman Rahim

Joydeep Banerjee

Debabrata Das Roy

A method includes: receiving a simulation vector associated with a circuit design, wherein the simulation vector is associated with a simulation vector type; identifying, by a processor, a plurality of glitch transitions from among one or more transitions associated with a pin of a cell of the circuit design during a clock period of the simulation vector, and determining a glitch power consumption of the cell during the clock period based on the plurality of glitch transitions.

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Karnataka, India

Mayur Bubna