Texas Instruments Corporation

Freescale Semiconductor,inc.

Google Inc.

International Business Machines Corporation

Nxp Usa, Inc.

Morgan Stanley Services Group Inc.

Samsung Electronics Co., Ltd.

Mayank Jain

Preetam Charan Anand Tadeparthy

Sanjoy Kumar Dey

Naman Bafna

Christopher Jacob Durr

Hector Mauricio Ayala

Dhandapani Shanmugam

Muthusubramanian Venkateswaran

Preetam Tadeparthy

Vikram Gakhar

Vikas Lakhanpal

Mehak Mehta

Rahul Chenny

Ammineni Balaji

Sreelakshmi Suresh

Anil Kumar Gottapu

Rohit Narula

Dinesh G Venkatraman

Pamidi Ramasiddaiah

Karthik Anyam

Ashita Batra

Sarma Sundareswara Gunturi

Indu Prathapan

Wenkai Wu

Shobhit Singhal

Kuang-Yao Cheng

Dattatreya Baragur Suryanarayana

Subodh Kumar

Aratrika Sarkar

Matthew John Ascher Schurmann

Nishant Bugalia

Prem K Kalra

Abhijit Anant Naik

Sanjit Vijay Mehta

Divyesh Kumar Shah

Mithlesh Shrivas

Vishal Shaw

Charan Hemanth Kumar

Ayyapparaj Radhakrishnan Ganesan

Meet Singh

Satya Verma

Aman Taneja

Sourabh Kumar Janghel

Ashish Singh

Vijay Kumar Butte

Aditya Ramesh

Sridhar Ramesh

Arvind Venkatadri

Vijayvithal Someracharya Jahagirdar

An example apparatus includes: a phase circuit configured to receive a pulse of a pulse width module (PWM) signal; provide, after receiving the pulse, an output voltage to a load; exhibit a fault; in response to the fault corresponding to a first category, transmit a first code voltage in a current sense (CS) signal; in response to the fault corresponding to a second category, transmit a reference voltage in the CS signal; receive, after transmission of the reference voltage, a tristate voltage in the PWM signal; and transmit, after receiving the tristate voltage, a second code voltage in the CS signal based on a type of the fault and the second category.

Methods and apparatus to detect and diagnose faults in buck regulators

In some examples, a circuit includes a state machine. The state machine is configured to operate in a first state in which the state machine gates a pulse width modulation (PWM) signal provided for control of a power converter according to a first signal provided by a voltage control loop. The state machine is configured to operate in a second state in which the state machine gates the PWM signal according to a second signal provided by a current limit comparator. The state machine is configured to transition from the first state to the second state responsive to the second signal being asserted after the first signal is asserted in a switching cycle of the power converter. The state machine is configured to transition from the current state to the first state responsive to the first signal being asserted after the second signal in a switching cycle of the power converter.

Power converter control with programmable blanking time

Systems and methods for translating natural language to SQL on a custom enterprise data warehouse powered by Generative AI. With an embodiment of the present invention, a natural language question may be converted to a meaningful and accurate database query, e.g., SQL query, relevant to tables existing in an enterprise data warehouse. An embodiment of the present invention is directed to a comprehensive approach of transforming a natural language query to a focused SQL query using domain specific data models across firmwide metadata systems and data systems. In response to a user query, an embodiment of the present invention performs metadata analysis, targeted data retrieval and then SQL generation. An embodiment of the present invention may apply data warehousing standards and guidelines followed in the enterprise and provide a plug-and-play type architecture and solution that is scalable to large warehousing and other systems.

Natural language to SQL on custom enterprise data warehouse powered by generative artificial intelligence

In an example, an apparatus includes a first decoder circuit having a first voltage identification (VID) analog input and a first digital output. The apparatus also includes a precharge circuit having a digital input and a first analog output, the digital input coupled to the first digital output. The apparatus also includes a second decoder circuit having a second VID analog input, a precharge analog input and a second digital output, the precharge analog input coupled to the first digital output. The apparatus also includes a multiplexer having a multiplexer output and first and second multiplexer inputs, the first multiplexer input coupled to the first digital output, and the second multiplexer input coupled to the second digital output.

Voltage identification signal decoder with precharging

A system and method for creating accessibility of any website or application for people with sight, hearing or speech disabilities. The system and method can include receiving input of the website or the application to be accessed and an indicator as to specific disabilities a user, scoring the website or the application for its accessibility based on the specific disabilities of the user, and if the score is below a threshold, determining an alternative form for the input of the website or the application to accommodate the specific disabilities of the user.

Systems and methods for accessible websites and/or applications for people with disabilities

One example includes a VID signal decoder circuit. The circuit includes a coarse resolution decoder that receives a VID signal. The VID signal can be encoded with a digital value of an output voltage. The coarse resolution decoder can decode the VID signal to generate a first digital signal. The circuit also includes a fine resolution decoder that receives the VID signal and to decode the VID signal to generate a second digital signal. The circuit further includes a multiplexer to provide the first digital signal as an output signal responsive to a first state of a selection signal and to provide the second digital signal as the output signal responsive to a second state of the selection signal. The first and second states of the selection signal can be based on a relative amplitude of the first and second digital signals.

Voltage identification signal decoder

In an example, a method includes storing a pending PWM pulse for a switching voltage regulator. The method also includes determining a switching voltage regulator is operating in a current limit mode, where an inductor current is above a current limit threshold. The method includes providing a predetermined number of PWM pulses in the current limit mode. The method also includes, responsive to providing the predetermined number of PWM pulses, ceasing storage of pending PWM pulses for the switching voltage regulator.

Pulse width modulation techniques for a multiphase voltage converter

Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for optimized graph traversal are disclosed. In one aspect, a method includes the actions of receiving a given phrase that is input through a user interface by a digital component provider. The actions further include determining an entity that is being referred to by the given phrase. The actions further include identifying properties of the entity. The actions further include selecting a subset of the properties that were identified for the entity. The actions further include identifying additional phrases. The actions further include updating the user interface to present at least some of the additional phrases with programmatic controls that assign one or more of the additional phrase as distribution criteria for digital components of the digital component provider in response to activation of the programmatic controls.

Optimized graph traversal

Multi-mode power converter with programmable control

An over/under voltage protection circuit includes a voltage input terminal, a digital-to analog converter, a comparator, and a control circuit. The comparator includes a first input coupled to an output of the digital-to-analog converter, and a second input coupled to the voltage input terminal. The control circuit includes an output coupled to an input of the digital-to-analog converter, and an input coupled to an output of the comparator. The control circuit is configured to set the digital-to-analog converter to generate an overvoltage fault threshold responsive to the output of the comparator indicating that voltage of a signal at the voltage input terminal exceeds a threshold currently generated by the digital-to-analog converter.

Over/under voltage detection circuit

An analog-to-digital converter (ADC) includes a digital-to-analog converter (DAC) having a resistor network. The resistor network includes a first and second segments. The first segment includes a first switch coupled between a first supply voltage node and a first set of resistors. The second segment includes a second switch coupled between the first supply voltage node and a second set of resistors. The first segment includes a third switch coupled in series with a second resistor. The series-combination of the third switch and second resistor coupled in parallel with at least one resistor of the first set of resistors. The second segment includes a fourth switch coupled in series with a third resistor. The series-combination of the fourth switch and third resistor is coupled in parallel with at least one resistor of the second set of resistors.

Segmented resistor digital-to-analog converter

A circuit includes a phase control logic, an analog-to-digital converter (ADC), and digital logic. The phase control logic is configured to couple to a plurality of power phases of a multi-phase power supply. The digital logic is configured to couple to the phase control logic and the ADC, to receive an instruction to operate in a self-calibration mode of operation, receive a first message including a value associated with a calibrated load configured to couple to the plurality of power phases, perform a self-calibration sub-routine for each power phase of the plurality of power phases based at least partially on the received instruction, the received first message, and a signal received from the ADC, and receive a second message instructing the digital logic to store a result of the self-calibration in a memory of the circuit.

Power supply telemetry self-calibration

Growing community of inventors

Ambala Cantt, India

Mayank Jain