Commissariat a L'energie Atomique Et Aux Energies Alternatives

Centre National De La Recherche Scientifique

Arkema France

Maxime Argoud

Hubert Moriceau

Raluca Tiron

Pierre Morin

Frank Fournel

Emmanuel Augendre

Sylvain Maitrejean

Christophe Morales

Nicolas Posseme

Christophe Navarro

Marc Zussy

Xavier Chevalier

Frederic Mazen

Aurélien Suhm

Ahmed Gharbi

Christian Fretigny

Guillaume Claveau

Jeremy Da Fonseca

A method for coating chips resting, by a rear face opposite to a front face, on a main face of a support substrate, and separated from each other by an inter-chip space, includes a step of forming a photosensitive coating film covering the front faces and the inter-chip spaces. The method further includes a first photolithographic sequence which comprises an insolation sub-step, and a dissolution sub-step. The sequence leads to a partial removal of the photosensitive coating film so as to maintain the film exclusively at the inter-chip spaces and, advantageously recessed relative to the front faces.

Method for coating chips

A field-effect transistor including an active zone comprises a source, a channel, a drain and a control gate, which is positioned level with the channel, allowing a current to flow through the channel between the source and drain along an x-axis, the channel comprising: a first edge of separation with the source; and a second edge of separation with the drain; the channel being compressively or tensilely strained, wherein the channel includes a localized perforation or a set of localized perforations along at least the first and/or second edge of the channel so as to also create at least one shear strain in the channel. A process for fabricating the transistor is provided.

Transistor comprising a channel placed under shear strain and fabrication process

The invention relates to a field-effect transistor including an active zone including a source, a channel, a drain and a control gate, which is positioned level with said channel, allowing a current to flow through said channel between the source and drain along an x-axis, said channel including: a first edge of separation with said source; and a second edge of separation with said drain; said channel being compressively or tensilely strained, characterized in that said channel includes a localized perforation or a set of localized perforations along at least said first and/or second edge of said channel so as to also create at least one shear strain in said channel. The invention also relates to a process for fabricating said transistor.

A method for forming a functionalised assembly guide intended for the self-assembly of a block copolymer by graphoepitaxy, includes forming on the surface of a substrate a neutralisation layer made of a first material having a first neutral chemical affinity with regard to the block copolymer; forming on the neutralisation layer a first mask including at least one recess; depositing on the neutralisation layer a second material having a second preferential chemical affinity for one of the copolymer blocks, in such a way as to fill the at least one recess of the first mask; and selectively etching the first mask relative to the first and second materials, thereby forming at least one guide pattern made of the second material arranged on the neutralisation layer.

Method for forming a functionalised assembly guide

The invention concerns a manufacturing method for nanolithography masks from a PS-b-PMMA block copolymer film deposited on a surface to be etched, said copolymer film comprising PMMA nanodomains orientated perpendicularly to the surface to be etched, said method being characterized in that it comprises the following steps:

Method for manufacturing a nanolithography mask

A method for manufacturing a flexible structure including implanting ionic species in first and second source substrates so as to form first and second embrittlement regions respectively, delimiting first and second thin films, providing a flexible substrate, the stiffness R of which is less than or equal to 10GPa&#xb7;&#x3bc;m, securing the first and second thin films to the first and second faces of the flexible substrate respectively so as to form a stack including the flexible structure delimited by the first and second embrittlement regions, the flexible structure having a stiffening effect suitable for allowing transfers of the first and second thin films, and applying a thermal budget so as to transfer the first and second thin films onto the flexible substrate.

Manufacturing a flexible structure by transfers of layers

A method for obtaining a film made out of a first material on a polymer support, said method comprising bonding a first wafer to a second wafer, thereby defining a bonding interface between said first wafer and said second wafer, at least one of said first and second wafers comprising a layer of said first material situated in proximity to said bonding interface, in said first wafer, hollowing out a cavity, said cavity comprising a bottom parallel to said bonding interface that defines, in said first wafer, a bottom zone at a controlled distance relative to said second wafer, forming, in said cavity, a polymer layer on a thickness controlled from a bottom thereof to obtain a combined wafer portion, said combined wafer portion comprising a bottom zone formed by said polymer layer on said bottom and a peripheral zone, and eliminating said second wafer on a major portion of a thickness thereof, thereby releasing, beneath said polymer layer, a film comprising said layer of said first material.

Method of fabricating polymer film in the cavity of a wafer

A method of transferring a layer including: a) providing a layer joined to an initial substrate with a binding energy E0; b) bonding a front face of the layer on an intermediate substrate according to an intermediate bonding energy Ei; c) detaching the initial substrate from the layer; e) bonding a rear face onto a final substrate according to a final bonding energy Ef; and f) debonding the intermediate substrate from the layer to transfer the layer onto the final substrate; step b) comprising a step of forming siloxane bonds Si&#x2014;O&#x2014;Si, step c) being carried out in a first anhydrous atmosphere and step f) being carried out in a second wet atmosphere such that the intermediate bonding energy Ei takes a first value Ei1 in step c) and a second value Ei2 in step f), with Ei1&#x3e;E0 and Ei2&#x3c;Ef.

Double layer transfer method

A method for transferring a thin layer of monocrystalline silicon from a free face of a monocrystalline silicon donor substrate having a thickness greater than that of the thin layer includes implanting ions through the free face to form a buried brittle layer in the silicon, using a polymer layer, bonding the donor substrate, by the free face, to a receiver substrate, and fracturing the thin layer from the donor substrate at the buried brittle layer by thermal fracture processing, and selecting conditions of implantation such that a thickness of the thin layer is smaller than 10 micrometers, and a thickness of the polymer layer is below a critical threshold defined as a function of energy and dose of the implantation, the critical threshold being less than or equal to the lesser of 500 nanometers and the thin layer's thickness.

Growing community of inventors

Lyons, France

Maxime Argoud