Intel Corporation

Maxim Levit

Efraim Rotem

Nadav Shulman

Shmuel Zobel

Eliezer Weissmann

Doron Rajwan

Dorit Shapira

Roman Rechter

Oren Zonensain

Almog Reshef

A performance management scheme for a processor based on leakage current measurement in field. The scheme performs the operations of detection and correction. The operation of detection measures per core leakage current in the field (e.g., using voltage regulator electrical current counters). The operation of correction changes the processor power management behavior. For example, processor cores showing high leakage degradation may be logically swapped with cores showing low leakage degradation.

Leakage degradation control and measurement

In one embodiment, a processor includes at least one core, at least one thermal sensor, and a power controller including a first logic to dynamically update a time duration for which the at least one core is enabled to be in a turbo mode. Other embodiments are described and claimed.

Dynamically updating at least one power management operational parameter pertaining to a turbo mode of a processor for increased performance

A method is described that includes monitoring degradation of a semiconductor chip's transistors during normal operation. The method further includes raising an internal voltage of the semiconductor chip in response to the degradation. The method further includes determining that the degradation has reached a threshold. The method further includes triggering application of an elevated temperature to the semiconductor chip so that the degradation is at least partially reversed. The method further includes applying a new lower internal voltage of the semiconductor chip in account of the degradation reversal.

Semiconductor chip having transistor degradation reversal mechanism

Reducing power to a minimum permissible value based on temperature of a component may permit savings in power consumption.

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Binyamina, Israel

Maxim Levit