Au Optronics Corporation

Quanta Display Inc.

Maw-Song Chen

Yu-Cheng Chen

Kuo-Yu Huang

Chih-Hung Lin

Chuan-Sheng Wei

Te-Chun Huang

Wu-Liu Tsai

Tsan-Chun Wang

Wei-Ming Huang

Chih-Hung Shih

Chau-Shiang Huang

Yi-Hui Li

Wen-Yi Hsu

Yi-Chen Chiang

Yu-Ting Lin

Ching-Huan Lin

Chi-Mao Hung

Yao-Jen Hsieh

Che-Chia Chang

Wan-Yu Lo

Sheng-Chao Liu

Yu-Hsuan Li

Pei-Ming Chen

Ken-Ming Chen

Ya-Ting Hsu

Yu-Han Huang

Ruei-Pei Chen

Fu-Chun Tsao

Tzu-Wei Ho

Zheng-Han Li

Ming-Tao Chiang

A manufacturing method of an array substrate including following steps is provided. A plurality of scan lines are formed on a substrate having a pixel region and a fan-out region. A plurality of data lines are formed. A plurality of transistors are formed and respectively electrically connected to the corresponding scan lines and data lines. A plurality of common electrodes are formed. A plurality of pixel electrodes are formed and respectively electrically connected to the corresponding transistors. A plurality of first fan-out lines, second fan-out lines, and third fan-out lines are formed in the fan-out region. Each of the third fan-out lines includes a transparent conductive layer and an auxiliary conductive layer located on and contacting the transparent conductive layer. The third fan-out lines and the common electrodes are formed by the same photomask.

Manufacturing method of array substrate

A pixel structure including an active device, a first protection layer, a first electrode, an isolator, a second protection layer and a second electrode is provided. The active device includes a gate, a source and a drain. The first protection layer covers the active device and has a first opening above the drain. The first electrode is disposed above the first protection layer. The first electrode has a side wall corresponding to the first opening. The isolator covers the side wall of the first electrode. The second protection layer covers the first electrode. The second electrode is disposed on the second protection layer, electrically connected to the drain through the first opening, and electrically isolated from the first electrode by the second protection layer and the isolator.

Pixel structure with isolator and method for fabricating the same

A display panel, including a device substrate, an opposite substrate, a sealant, and a display medium, is provided. A pixel array of the device substrate is located in a display region, and a periphery circuit of the device substrate is located in a non-display region, wherein the periphery circuit includes at least one driving device, a planarization layer, and at least one wire. The planarization layer covers the driving device. The wire is located on the planarization layer, and the wire is electrically connected with the driving device and disposed to overlap the driving device. The opposite substrate is located opposite to the device substrate, and the sealant is located in the non-display region therebetween and covers the wire. The display medium is located between the device substrate, the opposite substrate, and the sealant. A manufacturing method of a display panel is also provided.

Display panel comprising a wire disposed and sandwiched in between a sealant and a planarization layer and method for manufacturing the same

A display panel including first and second pixel structures and a light shielding pattern layer is provided. The first pixel structure includes a first pixel electrode including first pixel electrode bars, wherein a first maximum spacing is formed between any two adjacent first pixel electrode bars of the first pixel structure. The second pixel structure includes a second pixel electrode including second pixel electrode bars, wherein a second maximum spacing which is larger than the first maximum spacing is formed between two adjacent second pixel electrode bars of the second pixel structure. The light shielding pattern layer has first and second light shielding portions. The area of the second light shielding portion is larger than the area of the first light shielding portion. The first pixel electrode is close to the second light shielding portion and the second pixel electrode is away from the second light shielding portion.

Display panel having a plurality of pixel electrode bars with different spacing

A display panel is provided. The display panel has a display area and a peripheral area and includes a plurality of pixels, a plurality of data lines and a plurality of signal traces. The pixels are disposed on the display area and arranged in an array. The data lines extend from the display area to the peripheral area and are respectively electrically connected to a plurality of columns of pixel. The signal traces extend from the display area to the peripheral area and are parallel to the data lines. In addition, the data lines and the signal traces are respectively disposed between two columns of pixels, and the signal traces include a plurality of gate signal traces.

Display panel

A manufacturing method of pixel structure includes forming a first conductive layer on a substrate and forming a first insulation layer thereon; forming a second conductive layer on the first insulation layer; forming a second insulation layer on the second conductive layer; forming a semiconductor layer on the second insulation layer above the gate; forming a third conductive layer on the second insulation layer, wherein the gate, the semiconductor layer, the source, and the drain together constitute a thin film transistor, and the first electrode, the second electrode, and the third electrode together constitute a capacitor; forming a third insulation layer on the third conductive layer; and forming a pixel electrode on the third insulation layer, the pixel electrode being electrically connected to the drain.

Manufacturing method of pixel structure

A display panel having a display region and a non-display region is provided. The display panel includes a plurality of pixel structures in the display region, and each pixel structure includes a scan line, a data line, a first active device, a pixel electrode, a first insulating layer, a capacitor electrode, and a second insulating layer. The first active device includes a first gate, a first channel, a first source, and a first drain. The second insulating layer covers the first insulating layer and the capacitor electrode and is located between the capacitor electrode and the first drain. At least one driving circuit is disposed in the non-display region and includes at least one second active device. Hence, a relatively thin insulating layer can be disposed between the capacitor electrode and the drain to reduce the area of the capacitor region and to achieve a desired aperture ratio.

Driving circuit and display panel having the same

A pixel array including a pixel electrode and an active device is provided. The active device includes a gate, a channel layer, a source, a drain, a connection electrode, a first branch portion and a second branch portion. The gate is electrically connected with a scan line. The channel layer located at a side of the gate is electrically isolated from the gate. The source, the drain and the connection electrode are disposed on a part region of the channel layer. The first branch portion disposed on a part region of the channel layer is connected with an end of the connection electrode. The first branch portion surrounds the source located on the channel layer. The second branch portion disposed on a part region of the channel layer is connected with the other end of the connection electrode. The second branch portion surrounds the drain located on the channel layer.

Pixel array, active device array substrate and flat display panel

A pixel structure includes a first electrode on a substrate, a first insulation layer covering the first electrode, a gate located on the first insulation layer, a second electrode located on the first insulation layer above the first electrode, a second insulation layer covering the gate and the second electrode, a semiconductor layer located on the second insulation layer above the gate, a source and a drain that are located on the semiconductor layer, a third electrode, a third insulation layer, and a pixel electrode. The third electrode is located on the second insulation layer above the second electrode and electrically connected to the first electrode. The third insulation layer covers the source, the drain, and the third electrode. The pixel electrode is located on the third insulation layer and electrically connected to the drain.

Pixel structure having storage capacitance of the capacitor

A display device having slim border-area architecture is disclosed. The display device includes a substrate, a plurality of data lines, a plurality of gate lines, a plurality of auxiliary gate lines and a driving module. The substrate includes a display area and a border area. The data lines, the gate lines and the auxiliary gate lines are disposed in the display area. The driving module is disposed in the border area. The gate lines are crossed with the data lines perpendicularly. The auxiliary gate lines are parallel with the data lines. Each auxiliary gate line is electrically connected to one corresponding gate line. The data and auxiliary gate lines are electrically connected to the driving module based on an interlace arrangement. Further disclosed is a driving method for delivering gate signals provided by the driving module to the gate lines via the auxiliary gate lines.

Display device having slim border-area architecture and driving method thereof

An active device, a pixel structure, and a display panel are provided. The pixel structure includes a scan line, a data line, an active device, a gate insulating layer, a pixel electrode, a capacitor electrode, and a capacitor dielectric layer. The active device includes a gate, a channel, a source, and a drain. The gate is electrically connected to the scan line. The source is electrically connected to the data line. The gate insulating layer is disposed between the gate and the channel. The pixel electrode is electrically connected to the drain. The capacitor electrode is located on the gate insulating layer. The capacitor dielectric layer is located between the capacitor electrode and the drain.

Active device, pixel structure and display panel

A display panel including an active device array substrate, an opposite substrate and a display medium is provided. The active device array substrate includes a substrate, scan lines, data lines, pixel units, and data signal transmission lines. The scan lines and data lines define a plurality of pixel regions on the substrate. Each pixel unit is disposed within one of the pixel regions respectively, and each pixel unit includes a plurality of sub-pixel units. The sub-pixel units within the same pixel unit are electrically connected with the same data line, and each sub-pixel unit within the same pixel unit is electrically connected with one of the scan lines respectively. Each data signal transmission line is electrically connected with one of the data lines, and an extending direction of the data signal transmission line is substantially parallel with an extending direction of the scan lines.

Display panel and active device array substrate thereof

A driving circuit and a common electrode are located within a sealant region of the first substrate, wherein the driving circuit includes switch devices and turn-line structures. The common electrode is located within the sealant region of the first substrate. The planar layer is located on the first substrate, wherein the thickness of the planar layer at the turn-line structure of the driving circuit is less than the thicknesses of other portions. The conductive layer is located on the planar layer. A second substrate having an electrode thereon is disposed opposite to the first substrate. A liquid crystal layer is located within the display region between the first substrate and the second substrate. A sealant is located within the sealant region between the first substrate and the second substrate, and conductive balls are distributed in the sealant.

Display panel with driving circuit and common electrode within sealant

An active array substrate, a liquid crystal display panel and a method for manufacturing the active array substrate are provided. The active array substrate includes a base, scan lines, data lines and gate tracking lines disposed on the base. Each of the gate tracking lines has first portions, auxiliary portions and junction portions, wherein the junction portion and the first portion are formed in different layers. One of the junction portions is electrically connected with corresponding one of the first portions.

Growing community of inventors

Taipei, Taiwan

Maw-Song Chen