Stmicroelectronics S.r.l.

Mauro Cleris

Davide Luigi Brambilla

Edoardo Botti

Daniela Nebuloni

Antonio Grosso

There is provided an adjustable harmonic distortion detector that includes a clock signal source, means for the detection of a first period of evaluation, and means for the detection of a second period of evaluation. The detector has the characteristic that a first block memorizes a number equal to the clock pulses present in the first period of evaluation, a multiplier block performs a multiplication between the number stored in the first block and a multiplicative factor during the second period of evaluation, and a second block memorizes the outcome. The second block is adapted to generate an output signal when the outcome in the second block is equal to zero.

Adjustable harmonic distortion detector and method for using the same

An amplifier having an input; an output supplying an output signal, and a feedback network connected between the input and the output, and a distortion detection circuit. The feedback network includes a first and a second feedback element arranged in series and forming an intermediate node supplying an intermediate signal in phase with the output signal in absence of distortion, and in phase-opposition with the output signal in presence of distortion. The distortion detection circuit includes a phase-comparating circuit which detects the phase of the output signal and of the intermediate signal, and generates a distortion-indicative signal, when the intermediate signal is in phase opposition with respect to the output signal.

Circuit for detecting distortion in an amplifier, in particular an audio amplifier

An integrated circuit for producing a small slope voltage ramp includes a circuit for generating a periodic triangular current signal, and a circuit for generating, at the beginning of each period of the triangular signal, a pulse of a certain duration which is much smaller than the period of the triangular signal. A control loop is input at a node with the triangular current signal and produces the desired slow voltage ramp on the output node. The control loop includes a first hold circuit coupled to the input node via a first switch controlled by the pulse, and a transconductance operational amplifier, whose inputs are respectively coupled to the input node and to the output node. Also, the control loop includes a second hold circuit coupled to the output of the operational transconductance amplifier via a second switch controlled in a complementary manner with respect to the first switch. A resistor of a much smaller value than the ratio between the period of the triangular signal and the capacitance of the storage capacitor of the first hold circuit is connected between the output of the second hold circuit and the input node.

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Bareggio, Italy

Mauro Cleris