Stmicroelectronics S.r.l.

Maurizio Ricci

Ezio Galbiati

Giuseppe Maiocchi

Michele Boscolo Berto

Davide Betta

Marco Sautto

Simone Bellisai

Luigi Arpini

Eleonora Chiaramonte

A method includes coupling an electric motor in a hard disk drive to a set of driver circuits. Each driver circuit includes a high-side switch and a low-side switch. The high-side switch has a high-side current flow path between a supply node coupled to a supply voltage and a switching node coupled to a winding of the electric motor. The low-side switch has a low-side current flow path between the switching node and ground. Respective conduction currents are generated through the low-side current flow paths, in response to a command to reduce the motor speed by coupling a drive voltage to the control terminals of the low-side switches. An intensity of at least one of the respective conduction currents is sensed. In response to the sensed current intensity exceeding a current intensity threshold, the control terminals of the low-side switches are coupled to respective ones of the switching nodes.

Method of operating an electric motor, corresponding device and hard disk drive

An embodiment method includes rectifying a back electromotive force of a spindle motor in a hard disk drive and energizing a voice coil motor in the hard disk drive using the rectified back electromotive force of the spindle motor via a voice coil motor power stage to retract a head of the hard disk drive to a park position. The head is retracted by moving the head towards the park position during a first retract phase and retaining the head in the park position during a second retract phase by applying a bias voltage to the voice coil motor power stage during a bias interval of the second retract phase. The method also includes producing a saturation signal indicative of onset of saturation in the voice coil motor power stage and controlling the bias voltage during the second retract phase.

Method of operating hard disk drives and corresponding control circuit

An embodiment circuit comprises first and second output nodes with an inductor arranged therebetween, and first and second switches coupled to opposing ends of the inductor. The switches are switchable between non-conductive and conductive states to control current flow through the inductor and produce first and second output voltages. The current intensity through the inductor is compared with at least one reference value. Switching control circuitry is coupled with the first and second switches, the first and second output nodes, and current sensing circuitry, which is configured to control the switching frequency of the first and second switches as a function of the output voltages and a comparison at the current sensing circuitry. The switching control circuitry is configured to apply FLL-FFWD processing to produce the reference values as a function of a timing signal, targeting maintaining a constant target value for the converter switching frequency.

Single inductor multiple output switching converter and method to control the same

An embodiment circuit comprises first and second output nodes with an inductor arranged therebetween, and first and second switches coupled to opposed ends of the inductor. The switches are switchable between non-conductive and conductive states to control current flow through the inductor and produce first and second output voltages. The current intensity through the inductor is compared with at least one reference value. Switching control circuitry is coupled with the first and second switches, the first and second output nodes, and current sensing circuitry, which is configured to control the switching frequency of the first and second switches as a function of the output voltages and a comparison at the current sensing circuitry. The switching control circuitry is configured to apply FLL-FFWD processing to produce the reference values as a function of a timing signal, targeting maintaining a constant target value for the converter switching frequency.

A method of controlling a half-bridge circuit includes receiving an analog feedback signal proportional to an output of the half-bridge circuit, comparing the received analog feedback signal with a threshold value, selecting a digital feedback signal based on a result of the comparing, comparing the digital feedback signal with a digital reference signal to generate a digital error signal, integrating the digital error signal to generate an integration error signal, downscaling the integral error signal to generate a downscaled integration signal, sampling the downscaled integration signal to generate a sampled integration signal, and generating pulsed signals from the sampled integration signal to provide an input to the half-bridge circuit.

Method of controlling a half-bridge circuit

A half-bridge control circuit comprises an input terminal, an output terminal for providing a pulsed signal to a half-bridge driver circuit configured to drive two electronic switches connected between two supply terminals, and a feedback terminal for receiving a feedback signal indicative of the instantaneous voltage value at a switching node between the two electronic switches. A selector circuit provides a digital feedback signal. A subtractor generates an error signal by subtracting the digital feedback signal from the reference signal. An integrator generates an integration signal by integrating the value of the error signal. A down-scale circuit generates a reduced resolution integration signal by discarding one or more least significant bits of the integration signal. A sampling circuit generates a sampled integration signal by sampling the reduced resolution integration signal. A pulse generator circuit generates the pulsed signal as a function of the sampled integration signal.

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Bergamo, Italy

Maurizio Ricci