Stmicroelectronics International N.v.

Allegro Microsystems, LLC

St-ericsson Sa

Stmicroelectronics S.r.l.

Stmicroelectronics Design and Application S.r.o.

Matthieu Thomas

Ondrej Tlaskal

Patrik Arno

Bohumil Janik

Petr Bily

Martin Drinovsky

Massimo Mazzucco

Michele Suraci

Vladimir Molata

Radek Zeipl

Output buffer diagnostic circuits for monitoring a sensor output buffer include a duplicate resistive network corresponding to a resistive network in the monitored sensor output buffer. The duplicate resistive network may include the same or similar topology as the output buffer resistive network. The duplicate resistive network is configured to produce a differential duplicate signal indicative of when an error condition exits in the sensor output buffer. The diagnostic circuit can include averaging circuitry configured to receive the differential duplicate signal and produce an average duplicate signal. The diagnostic circuit can include an error comparison circuit configured to receive the average duplicate signal and detect when the average duplicate signal exceeds a nominal or preset error value corresponding to an error condition in the sensor output buffer. The error comparison circuit is configured to produce an error indication when the average duplicate signal exceeds the preset error value.

Diagnostic circuits with duplicate resistive networks for sensor output buffers

A sensor includes a first sensing element configured to sense a parameter and generate a first sensing element output signal indicative of the parameter, a first front end element configured to receive the first sensing element output signal and to generate a first front end signal, a second sensing element configured to sense the parameter and generate a second sensing element output signal indicative of the parameter, a second front end element configured to receive the second sensing element output signal and to generate a second front end signal, a difference block configured to receive the first and second front end signals and generate a difference signal indicative of a difference between the first and second front end signals, an absolute value block configured to receive the difference signal and generate an absolute difference signal indicative of an absolute value of the difference signal, and an offset comparator configured to compare the absolute difference signal to an offset threshold to detect whether a difference between an offset associated with the first front end signal and an offset associated with the second front end signal is within a predetermined tolerance.

Method and apparatus for sensor signal path diagnostics

A DC-DC converter circuit including at least: a first step down converter having a first pair of switching devices in a half bridge configuration. A second step down converter includes a second pair of switching devices in a half bridge configuration. The first and second step down converters are connected in parallel to an output node connected to an output coil and receive command signals. A feedback loop includes a synchronization module receiving the gate control signals of high side switching devices and adjusts as a function of the gate control signals a delay in a signal path from the command signal to each gate control signal of the high side switching device to synchronize the gate control signals.

DC-DC converter circuit with synchronization module and corresponding conversion method

An electronic device includes first and second transistors coupled in series between first and second source voltage levels. An inductor is coupled between a node coupling the first and second transistors and a load. Control logic is operative to generate control pulses operative to switch the first and second transistors. The controller generates the control pulses as a continuous stream of control pulses in a continuous conduction mode, and skips generation of some control pulses in a discontinuous conduction mode in response to a pulse skipping signal. A pulse skipping circuit is operative to generate a sense voltage as a function of an inductor current in the inductor, compare the sense voltage to ground, and generate a pulse skipping signal to the control logic when the sense voltage is below ground.

DC-DC switching converter with enhanced switching between CCM and DCM operating modes

A DC-DC converter transitions between continuous conduction mode (CCM) and discontinuous conduction mode (DCM) without causing any overshoot or undershoot deviation output voltage. The DC-DC converter operates in a PWM mode in CCM. During DCM, it skips PWM pulses when a sustained negative current is detected in an output inductor. The current sensing is achieved by sampling and integrating a voltage, the sign of which is inverse to current direction. The sample and hold and integrator circuits are small, simple, and scale to high frequencies. The pulse skipping circuit automatically adjusts the duty cycle of power pulses to force a zero inductor current at the end of each pulse.

DC-DC converter with enhanced automatic switching between CCM and DCM operating modes

A power conversion circuit uses smaller, cheaper, and faster analog and digital circuits, e.g., buffers, comparators, and processing circuits, to provide the information necessary to control a multilevel power converter faster, cheaper, and with a smaller footprint than conventional techniques. For example, a current detection circuit indirectly measures a direction of a current through an inductor connected between midpoint node and an output node of a multilevel power converter based on comparisons between voltages associated with the multilevel power converter. A capacitor voltage detection detects a capacitor voltage across the flying capacitor to generate a logic signal based on a comparison between the capacitor voltage and a first reference voltage. A control circuit selects an operating state of the multilevel power converter to regulate a first capacitor voltage across the first capacitor based on the indirectly measured direction of the inductor current, the logic signal, and an input command signal.

Efficient regulation of capacitance voltage(s) in a switched mode multilevel power converter

A multi-mode, dynamic, DC-DC converter supplies a dynamically varying voltage, as required, from a battery to an RF power amplifier (PA). In envelope tracking mode, a fast DC-DC converter generates a dynamic voltage that varies based on the amplitude envelope of an RF signal, and regulates the voltage at the PA. A slow DC-DC converter generates a steady voltage and regulates the voltage across a link capacitor. The fast and slow converters are in parallel from the view of the PA, and the link capacitor is between the fast converter and the PA. Because different nodes are regulated, no current sharing is possible between the converters. The link capacitor boosts the dynamic voltage level, allowing a maximum dynamic voltage at the load to exceed the battery voltage. In power level tracking mode, the fast converter is disabled and the link capacitor is configured to be in parallel with the load. The slow converter directly regulates the PA, and the link capacitor is in parallel with (added to) an output capacitor. Multiple wireless network standards may be supported, allowing for the sharing of RF circuits.

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Prague, Czechia

Matthieu Thomas