Siemens Aktiengesellschaft

Infineon Technologies Ag

Intel Corporation

Intel Deutschland Gmbh

Matthias Schoebinger

Lajos Gazsi

Fred Matthiesen

Stefan Meier

Bernd Zehner

Ulrich Totzek

Andreas Menkhoff

Stephan Henzler

Hans J Mattausch

Hans-Juergen Mattausch

Embodiments relate to a frequency generator. The frequency generator comprises a quantization device configured to synthesize a carrier signal with a desired frequency characterized by a series of phase transitions at desired time instants, by approximating a phase transition at a desired time instant with a phase transition at a quantized effective time instant. The frequency generator further comprises a noise shaper configured to provide a noise-shaped feedback signal using the desired time instant and the effective time instant. Moreover, the frequency generator comprises an error generator configured to cause an error component within the effective time instant, the error component being at least 50 percent of a temporal quantization unit.

Frequency generator, method and computer program

A method for determining a sampling time of a signal, the method including: determining a candidate sampling time of a signal for input to a sampling circuit; determining a resultant sampling time at which the sampling circuit samples the signal when input with the candidate sampling time; and determining a sampling time of the signal based on a noise shaping of a difference between the resultant sampling time and the candidate sampling time.

Method for determining a sampling time of a signal, device for determining the same, and method for determining a sampling parameter of a signal

This application discusses, among other things, apparatus and methods for suppressing irrelevant edges of a phase modulated signal. In an example, a method can include receiving phase modulation information at a suppression circuit of a communication device, computing distances between transitions of a phase modulation signal, the phase modulation signal associated with the phase modulation information, comparing the distances to a threshold distance at a comparator of the suppression circuit, and suppressing a first transition of the phase modulation signal associated with the phase modulation information if a first distance is less than the threshold distance.

Removal of irrelevance in phase-modulated digital carrier-signals

Exemplary implementations of electrical circuits and systems are disclosed, and methods for signal processing including sampling and quantizing of amplitude and band limited signals implemented through a Passive Pulse Modulation Analog to Digital Converter (PMADC).

Data converter having a passive filter

The invention relates to a device for correcting a receiver signal which is associated with an emission signal transmitted in a distorted transmission system. The emission signal comprises periods which can be determined by analyzing the received signal wherein determined properties are exhibited which are suitable for adjusting the correction. According to one embodiment, the device comprises a component for adjusting the correction based upon an analysis of the received signal and a component for monitoring and enabling the adjusting component when the received signal associated with the transmission signal exhibits certain characteristics.

Device for correcting a receiving signal

Receiver for receiving a received signal with a carrier frequency loop () which generates a carrier frequency deviation detection signal (TF) for detecting a carrier frequency of the received signal in a first carrier frequency capture range; a carrier phase loop () which generates a carrier phase deviation detection signal (TP) for detecting a carrier phase of the received signal, and settles when the carrier frequency deviation detection signal (TF) is within a second carrier frequency capture range; and with an offset control circuit () which changes the carrier frequency deviation detection signal (TF) and/or changes the second carrier frequency capture range by means of an offset control signal until a carrier phase lock detection circuit () indicates to the offset control circuit that the carrier phase offset of the received signal is less than an adjustable threshold value.

Receiver with offset compensation

An arrangement for DPCM coding with high data rate. In a DPCM coder, wherein respective prediction values (s) are subtracted from digitized picture element signals (s), the difference signals that result represent the prediction error .DELTA. supplied to a circuit element for cutputting a quantization error (11) pertaining to a difference signal. In a following adder, quantization errors (q) are added to the prediction errors (.DELTA.), whereby the quantized prediction error (.DELTA.q) can be taken at the output of the following adder. For forming the reconstructed picture element signal (s.sub.R), the quantization error (q) is added to the current picture element signal (s) in a first adder and is supplied to a first subtraction means via a predictor. In an embodiment of the circuit, a DPCM structure that has a shortest possible critical path for a DPCM structure that is composed of a quantizer, of an addition and of a register can be produced by dividing the predictor upon insertion or removal of individual registers.

Arrangement for DPCM-coding with high data rate

An arrangement for DPCM-coding of video signals. A DPCM coder wherein estimated values (s) are respectively subtracted from digitized picture element signals (s) and the estimated errors are used for signal transmission after quantization and coding. Every estimated value (s) is derived from a reconstructed picture element signal formed in an adder. A limiter between the first adder and the subtractor that reduces the calculating speed can be removed from the time-critical path in that the limiter function is distributed onto two paths that calculate in parallel. A subtraction of the signal taken at the adder output occurs in the one path; the subtraction of an upper or lower limit value (.alpha..multidot.G.sup.-, .alpha..multidot.G.sup.+) weighed with .alpha. and through-connected via a switch from the respective picture element signal (s) of the input side is carried out on the other path. An overflow recognition element and a multiplexer provide that only a difference of the two differences formed up to this point, that relate to the actual addition result (no overflow, positive overflow, negative overflow), is through-connected to a quantizer.

Arrangement for DPCM-coding of video signals

In DPCM coders, respective estimated values are subtracted from digitized picture element signals and the estimated errors are employed for signal transmission following quantization and coding. Each estimated error is quantized with a fictitious, positive operational sign in a first programmable logic arrangement and, parallel thereto, is quantized with a fictitious negative operational sign in a second programmable logic arrangement. Of these two quantizing results, the correct result is selected via a multiplexer controlled by the actual operational sign of the estimated error.

Arrangement for DPCM coding of television signals with fast signal

In a DPCM coder respective estimated values are subtracted from digitized picture element signals and estimated errors are used for signal transmission after quantization and coding. Each estimated value is derived from a reconstructed picture element signal formed in an adder. Separate, simultaneous subtractions of the signal taken at the output of the adder, as well as of the positive and negative adder limit values, from the respective picture element signal at the input thereby occur, whereby an overflow recognition device and a multiplexer provide that only the difference from the three differences formed up to this point are taken into consideration for quantization on the basis of the actual addition result, including no overflow, positive overflow and negative overflow.

Growing community of inventors

Munich, Germany

Matthias Schoebinger