Nxp B.v.

Nexperia B.v.

Matthias Rose

Jan Sonsky

Hendrik Johannes Bergveld

Philip Rutter

Henricus Cornelis Johannes Buthker

Ravichandra Karadi

Marcel Dijkstra

Cristian Pavao Moreira

Olivier Trescases

Arnoud Pieter Van Der Wel

Maxim Kulesh

Ralf Van Otten

Neha Goel

Tarik Naass

David King Wai Li

Thierry Mesnard

Franciscus Schoofs

Henricus Cornelis Johannes BÜTHKER

An integrated circuit (IC) includes circuitry in a plurality of power domains for transmitting and/or receiving radar chirp frames and first and second monitoring systems for monitoring supply voltages of a first and a second subset of the plurality of power domains, respectively. The first subset is monitored outside of a time window during which a chirp frame is transmitted and/or received utilizing circuitry of the IC, and the second subset is monitored during the time window. The first monitoring system includes an output for an error signal indicating a supply voltage in the first subset does not comply with a first voltage parameter. The second monitoring system includes a unique monitoring circuit for each power domain in the second subset, and each unique monitoring circuit includes an output for an error signal indicating a supply voltage in the second subset does not comply with a second voltage parameter.

Hybrid supply monitoring system for a radar device

A first error is determined between a bandgap reference output voltage of a bandgap reference circuit at a first temperature and a target voltage. A second temperature of the bandgap reference circuit is measured. A bandgap reference output voltage of the bandgap reference circuit is predicted at the second temperature and based on the first error. A second error is determined between the bandgap reference output voltage and the target voltage. A trim parameter of the bandgap reference circuit is determined based on the second error. The bandgap reference circuit is set with the trim parameter, where a third error between a bandgap reference output voltage of the bandgap reference with the trim parameter is less than the second error.

Predicting a bandgap reference output voltage based on a model to trim a bandgap reference circuit

A controller for controlling a DC-DC converter in a discontinuous conduction mode (DCM) includes an output module configured to provide a switch control signal to the DC-DC converter having an on-time and a switching frequency. The controller includes an on-time-control-module configured to receive a first compensation signal based on the output voltage of the DC-DC converter; and set the on-time of the switch control signal based on the first compensation signal. The controller also includes a frequency-control-module configured to receive a second compensation signal, wherein the second compensation signal is based on the output voltage of the DC-DC converter, and regulate the second compensation signal to a target range by setting the switching frequency of the switch control signal to one of a plurality of pre-defined discrete switching frequencies.

Controller for a power supply and a power supply

A burst-mode controller for a DC-DC converter includes an output module configured to provide a switch control signal to the DC-DC converter. The switch control signal includes a plurality of burst windows, each burst window corresponding to a period of a fixed-frequency burst clock and having a number of switching cycles. The burst-mode controller includes an on-time-control-module configured to receive a compensation signal based on the output voltage of the DC-DC converter, and set an on-time of the switching cycles of the switch control signal based on the compensation signal. The burst-mode controller also includes a burst-control-module configured to regulate the on-time of the switching cycles of the switch control signal by setting the number of switching cycles for each burst window of the switch control signal.

A control circuit provides a signal to a control terminal of the transistor to control the conductivity of the transistor. The control circuit includes a voltage-to-current converter that provides an indication of the control terminal-to-current terminal voltage of a transistor. The control circuit includes control circuitry that uses the indication from the voltage-to-current converter in controlling the current applied to the control terminal.

Transistor control terminal control circuit

A semiconductor device comprising: a die-source-terminal, a die-drain-terminal and a die-gate-terminal; a semiconductor-die; an insulated-gate-depletion-mode-transistor provided on the semiconductor-die, the insulated-gate-depletion-mode-transistor comprising a depletion-source-terminal, a depletion-drain-terminal and a depletion-gate-terminal, wherein the depletion-drain-terminal is coupled to the die-drain-terminal and the depletion-gate-terminal is coupled to the die-source-terminal; an enhancement-mode-transistor comprising an enhancement-source-terminal, an enhancement-drain-terminal and an enhancement-gate-terminal, wherein the enhancement-source-terminal is coupled to the die-source-terminal, the enhancement-gate-terminal is coupled to the die-gate-terminal and the enhancement-drain-terminal is coupled to the depletion-source-terminal; and a clamp-circuit coupled between the depletion-source-terminal and the depletion-gate-terminal.

Semiconductor device and associated methods

A predictive controller for an inductive DC-DC converter comprising a switchable inductor is described. The predictive controller includes a DC-DC controller configured to generate a plurality of switching phases to control the inductor current in the switchable inductor, the duration of the switching phases being determined from at least one of a reference inductor current value and a reference output voltage value. The predictive controller includes a supervisory controller coupled to the DC-DC controller and configured to set a reference inductor current value dependent on an expected change in load current and/or voltage of a load configured to be connected to the load terminal. The expected change in load current and/or voltage is determined from a predetermined load profile.

DC-DC converter controller

A cascode transistor circuit comprising a depletion-mode switch in series with a normally-off switch between a drain output terminal and a source output terminal. The circuit also includes a controller comprising a controller output terminal configured to provide a normally-on control signal for a normally-on control terminal of the depletion-mode switch, wherein the normally-on control signal is independent of the normally-off control signal; a negative voltage source configured to provide a negative voltage to the normally-on control terminal of the depletion-mode switch; and a feedback capacitance between the drain output terminal and a control node in a circuit path between the controller output terminal and the normally-on control terminal of the depletion-mode switch.

Cascode transistor circuit

Embodiments relate to a diode circuit which uses a Schottky diode. A parallel bypass branch has a switch and bypass diode in series. The operation of the switch is dependent on the voltage across the Schottky diode so that the bypass function is only effective when a desired voltage is reached. The diode circuit can be used as a replacement for a single diode, and provides bypass current protection preferably without requiring any external control input.

Diode circuit and power factor correction boost converter using the same

A cascoded power semiconductor circuit has a clamp circuit between the source and gate of a gallium nitride or silicon carbide FET to provide avalanche protection for the cascode MOSFET transistor.

Cascoded semiconductor devices

A cascode circuit arrangement has a low voltage MOSFET and a depletion mode power device mounted on a substrate (for example a ceramic substrate), which can then be placed in a semiconductor package. This enables inductances to be reduced, and can enable a three terminal packages to be used if desired.

Cascode circuit

The invention provides a cascode transistor circuit with a depletion mode transistor and a switching device. A gate bias circuit is connected between the gate of the depletion mode transistor and the low power line. The gate bias circuit is adapted to compensate the forward voltage of a diode function of the switching device. The depletion mode transistor and the gate bias circuit are formed as part of an integrated circuit.

Cascoded semiconductor devices with gate bias circuit

A cascoded power semiconductor circuit is provided for power switches based on depletion-mode (normally on) devices. The control circuit makes use of a bootstrap arrangement that allows an active control of both power switches of a cascode circuit using a single gate driver.

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Helmond, Netherlands

Matthias Rose