Asml Netherlands B.v.

Fraunhofer-gesellschaft Zur Foerderung Der Angewandten Forschung E.v.

Matthias Oberst

Yongxin Wang

Johann Hauer

Thomas Schweiger

Harald Gert Helmut Neubauer

A detector includes a plurality of sensing elements, section circuitry that communicatively couples a first set of sensing elements to an input of first signal processing circuitry, and a switch network that connects sets of sensing elements. Inter-element switches may connect adjacent sensing elements, including those in a diagonal direction. An output bus may be connected to each sensing element of the first set by a switching element. There may be a common output (pickup point) arranged at one sensing element that is configured to output signals from the first set. Various switching and wiring schemes are proposed. For example, the common output may be directly connected to the switch network. A switch may be provided between the output bus and first signal processing circuitry. A switch may be provided between the switch network and the first signal processing circuitry.

Enhanced architecture for high-performance detection device technical field

A shift register has a first latch and a second latch and a first output circuit and a second output circuit. The first latch and the second latch are series-connected. The latches are implemented to take over a signal state applied to their data inputs in a transparent state and to maintain the taken-over signal state in a non-transparent operating state. Clock inputs of the latches are switched such that the second latch is in the transparent operating state when the first latch is in the non-transparent operating state and vice versa. The first output circuit is implemented to provide a predetermined level independent of the signal state existing in the first latch at a first shift register output of the shift register in the transparent operating state and to provide a level depending on the signal state stored in the first latch in the non-transparent operating state of the first latch. The second output circuit is implemented to provide a predetermined level independent of the signal state existing in the second latch at a second shift register output of the shift register in the transparent operating state of the second latch and to provide a level depending on the signal state stored in the second latch in the non-transparent operating state of the second latch.

Growing community of inventors

Nuremberg, Germany

Matthias Oberst