International Business Machines Corporation

Matthias Mergenthaler

Andreas Fuhrer Janett

Peter Mueller

Stephan Paredes

Thomas E Morf

Stefan Filipp

Mridula Prathapan

Thilo Hermann Curt Stoeferle

Noelia Vico Trivino

Felix Julian Schupp

Konstantinos Tsoukalas

Patrick Harvey-Collard

A qubit device or system having isolated bottom corner gates includes a semiconductor substrate and a semiconductor fin perpendicularly adjoining a top surface of the substrate. The qubit device also includes a first gate located at a first corner between a first side of the fin and the top surface of the substrate, and a second gate located at a second corner between a second, opposite side of the fin and the top surface of the substrate. The first and second gates are electrically isolated from each other and used to control a first quantum dot near the top of the fin. A third gate located at the first corner has a contact for accumulating a channel to facilitate charge transport to and from a second quantum dot located near the bottom of the fin accumulated using the first and second gates.

Isolated bottom corner gates for spin-qubits in a fin

One embodiment of the invention provides a method for fabricating a self-aligned gate structure comprising forming at least one first trench having a first width and at least one second trench having a second width in a gate structure comprising a first metallic gate layer. The first width is smaller than the second width. The method comprises depositing at least one conformal dielectric layer on the first metallic gate layer. The dielectric layer completely fills the first trench and partially fills the second trench, such that a portion of the second trench is unfilled. The method comprises depositing a conformal second metallic gate layer on the dielectric layer. The second metallic gate layer fills the unfilled portion of the second trench. The method comprises removing portions of the second metallic gate layer to expose the dielectric layer. Remaining portions of the second metallic gate layer include self-aligned metallic gate electrodes.

Self-aligned gate isolation for multi-directional gate layouts in quantum and semiconductor devices

An electrostatic discharge (ESD) protection circuit is configured to protect a target circuit that operates in a cryogenic temperature is provided. The ESD protection circuit connects a terminal of the target circuit and a ground potential with no connection to a bias potential. When the ESD protection circuit receives a voltage potential at the terminal of the target circuit, the ESD protection circuit (i) disallows electrical current to flow through from the received voltage potential when the device is at a cryogenic temperature and (ii) allows electrical current to flow through from the received voltage potential when the device is at a room temperature.

Semiconductor quantum device ESD protection

A method of modifying a resonant frequency of a quantum device includes generating an ion beam having a beam energy and exposing a surface of the quantum device to the ion beam for an exposure time. The ion beam is incident onto the quantum device at an oblique angle that is less than 90 degrees as measured from the surface of the quantum device. The quantum device includes a Josephson junction, the ion beam exposing the quantum device proximate to the Josephson junction to modify a property of the Josephson junction, the property being associated with the resonant frequency of the quantum device.

Ion milling for frequency tuning of superconducting qubits

A device package includes a chip carrier having a cavity and one or more microwave waveguides configured to route signals. There is a chip including one or more pads and located within the cavity of the chip carrier. Each pad is aligned with a corresponding connector pad of a microwave waveguide of the one or more microwave waveguides of the chip carrier. At least one of the one or more pads is coupled to the connector pad of the corresponding microwave waveguide by way of an overlap capacitive coupling between the at least one pad and the aligned corresponding connector pad of the microwave waveguide.

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Zurich, Switzerland

Matthias Mergenthaler