International Business Machines Corporation

Conner Peripherals, Inc.

Matthew W Rooke

Thomas C Christensen

Me Van Le

Michael L Workman

Charles R Nielsen

Charles A Bates

Fred R Hansen

Paul T Petersen

Eugene K Lew

A write drive logic circuit is described. The write driver logic circuit comprises a set of write drivers, with each one of the set of write drivers having an input and an output, such that each write driver is responsive to an input signal applied to the input to provide a write output signal at the output as a function of the input signal. A set of memory devices (e.g. shift registers) is provided, one for each write driver. Each one of the shift registers stores unique head identification information and includes an output to controllably output a signal representative of the unique head identification information. Furthermore, each one of a set of multiplexers includes an output, a first input coupled to a corresponding one of the outputs of the set of shift registers to receive the signal representative of the unique identification information stored in the respective shift register and a second input coupled to a common write data line that transmits a signal representative of preselected information. The output of each one of the set of multiplexers is coupled to the input of a corresponding one of the set of write drivers such that one of the first and second inputs of the multiplexer is selectively applied to the input of the corresponding write driver.

Single channel, multiple head servo writing with embedded head

The invention is a write clock generator circuit adapted for use in disk drives having either dedicated servo or sector servo architecture. A high frequency write clock signal is generated from a relatively low frequency reference signal synchronized to disk rotation. The reference signal may originate from a number of sources, including a dedicated servo pattern, a sector servo pattern, any index pattern, or a spindle pulse. A clock generates a clock signal having a predetermined number of cycles for each reference period. A counter coupled to the output of the clock counts the number of clock cycles generated for each reference period. The number of cycles is then compared to an expected number corresponding to a desired clock frequency. If the compared numbers are not the same, an error signal is generated. Control logic receives the error signal and the reference signal, and generates an appropriate control signal. The control signal is coupled to the clock and thereby adjusts the write clock signal frequency.

Frequency controlled reference clock generator

The present invention demonstrates a rotating media storage system which quickly measures and accurately compensates for thermal and mechanical errors in the position of the data detector with respect to the written data. This is accomplished by measuring the error rate of the written data as a function of the read offset of the detector. Error rates become increasingly large as the sensed noise to signal ratio becomes large. The present invention counts the number of errors detected in reading written data for various read offsets when the data storage system is initially activated. When the number of errors reaches a target rate, the read offset required to produce the target rate is saved. This procedure is performed on either side of the data track. The detector is then centered between the two offsets. During the operation of the storage system, thermal and mechanical errors are introduced into the detector position compensation means. The present invention compensates for this by periodically determining a new offset for each side of the data track. The new offset which corresponds to the target error rate is found by interpolating between measured offsets for error rates which are higher and lower respectively than the target error rate. The new measured read offsets are obtained by reading back written data in a similar manner as was used to obtain the initial read offsets. The detector is then recentered with respect to the write transducer position between the new offsets on either side of the data track.

Functional measurement of data head misregistration

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San Jose, CA, United States of America

Matthew W Rooke