Gyrus Acmi, Inc.

Broadbus Technologies, Inc.

Matthew Sargeant

Francis J Stifter, Jr

Michael A Kahn

Geophrey J McComis

Jason P Colangelo

Geophrey J McCormis

A power supply delivery system is provided. The power supply delivery system includes a source module and a load module. The source module includes an input coupled to a Class 1 power source, plural outputs coupled to plural Class 2 cables, and circuitry coupled to the input and the plural outputs. The circuitry splits power received via the input into a plural Class 2 channels and conducts the plural Class 2 channels to the plurality of outputs. The load module includes plural inputs coupled to the plural Class 2 cables, an output coupled to a Class 1 load, and circuitry coupled to the plural inputs and the output. The circuitry combines the plurality of Class 2 channels received via the plural inputs into a single Class 1 channel and conducts the single Class 1 channel to the output.

Power supply delivery system for splitting and combining power

A single data bus to a memory device can be split up into a number of data bus portions, each of which is managed by a different respective controller chip of multiple controller chips. During a memory access to a respective memory device, each of the multiple controller chips controls a different corresponding portion of the data bus to retrieve data from or store data to the memory device depending on whether the access is a read or write. To perform the data access, a synchronizer circuit (internal and/or external to the memory controller chips) synchronizes the multiple memory controller chips such that one of the memory controller chips drives the address bus and/or control signals to the memory device. After setting the address to the memory device, the memory controller chips either read data from or write data to the memory device based on the address.

Data access and multi-chip controller

An on-demand server system herein includes a memory controller that coordinates access to one or more flash-based memory devices. The flash devices store large amounts of video content that can be selectively viewed on-demand by each of multiple destinations over a respective network. In addition to having access to an array of flash memory devices, the memory controller has access to a corresponding read buffer and write buffer. Use of the read buffer and the write buffer enable the memory controller to switch between transferring data stored in the write buffer to the array of memory devices and transferring the data in the array of memory devices to the read buffer. The write buffer stores on-demand video content that can be selected for viewing by different users. The read buffer stores segments of the on-demand video content currently streamed to the users.

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Westford, MA, United States of America

Matthew Sargeant