Future Wei Technologies, Inc.

Motorola Corporation

Freescale Semiconductor,inc.

Huawei Technologies Co., Limited

Matthew Richard Miller

Lawrence Edwin Connell

Brian Creed

Terrie McCain

Pallab Midya

Kent Jaeger

Patrick Lee Rakers

William J Roeckner

Omid Oliaei

Paul Ronald Ganci

Christopher N Kurby

Poojan Wagh

Craig S Petrie

Donald R Beyer

Homero Luz Guimaraes

David G Wiatrowski

Zhihang Zhang

Elias Dagher

Neil Calanca

Anthony G Dunne

Jyoti P Mondal

Krsman Martinovich

Andrew J Pagones

Ramesh Chadalawada

Kevin L Fluharty

Daniel J O'Hare

Alan Bannon

John Rinderknecht

Anne P Davies-Walsh

Embodiments are provided herein for low loss coupling capacitor structures. The embodiments include a n-type varactor (NVAR) configuration and p-type varactor (PVAR) configuration. The structure in the NVAR configuration comprises a p-doped semiconductor substrate (Psub), a deep n-doped semiconductor well (DNW) in the Psub, and a p-doped semiconductor well (P well) in the DNW. The circuit structure further comprises a source terminal of a p-doped semiconductor material within P well, and a drain terminal of the p-doped semiconductor material within the P well. Additionally, the circuit structure comprises an insulated gate on the surface of the P well, a metal pattern comprising a plurality of layers of metal lines, and a plurality of vias through the metal lines. The vias are contacts connecting the metal lines to the gate, the source terminal, and the drain terminal.

Apparatus and method for a low loss coupling capacitor

The disclosure relates to technology for an apparatus having a current conveyer comprising a first stage having a first differential input, and a second stage having a second differential input. The first and second stages are configured to operate in a push-pull mode to provide an output signal at a current conveyer output between the first stage and the second stage. The apparatus has a first frequency mixer configured to generate a first mixer signal based on an input signal and an oscillator signal having a first frequency. The first frequency mixer is configured to provide the first mixer signal to the first differential input. The apparatus has a second frequency mixer configured to generate a second mixer signal based on the input signal and a second oscillator signal having the first frequency. The second frequency mixer is configured to provide the second mixer signal to the second differential input.

Split mixer current conveyer

An apparatus comprises a plurality of selectable gain stages connected in parallel between a first bias voltage and ground, wherein each selectable gain stage comprises an amplification portion and a current steering portion, and wherein the current steering portion comprises a first selectable signal path connected between an output of the amplification portion and a signal output terminal, and a second selectable signal path connected between the output of the amplification portion and ground through a shunt device.

Programmable gain amplifier apparatus and method

The disclosure relates to technology for an adjustable gain device that includes differential input terminals, differential output terminals, signal processing circuitry, and first and second cross-coupled segments. The first cross-coupled segment is coupled between differential input terminals of the adjustable gain device and a negative input of the signal processing circuitry. The second cross-coupled segment is coupled between differential input terminals of the adjustable gain device and a positive input of the signal processing circuitry. The adjustable gain device has a gain that is adjustable by adjusting values of the first and second cross-coupled segments, while maintaining a substantially consistent frequency response and a substantially consistent input impedance of the adjustable gain device, so long as a specified relationship between values of the first and second cross-coupled segments is kept substantially constant.

Adjustable gain devices and methods for use therewith

The disclosure relates to technology for a receiver having a receive signal path including a mixer, a differential fixed gain or variable gain amplifier, and a differential filter. The mixer is configured to receive an RF signal, receive an oscillator signal, and output a differential down converted signal at one of a baseband or intermediate frequency (IF). The amplifier is downstream of the mixer and configured to receive the differential down converted signal from the mixer, apply a gain thereto, and output an amplified differential signal. The filter is downstream of the amplifier and configured filter the amplified differential signal received from the amplifier, and output a filtered differential signal. By locating the differential filter downstream of the differential amplifier within the receive signal path, distortion caused by the mixer is mitigated compared to if the filter were located upstream of the filter.

Receiver with reduced mixer-filter interaction distortion

The disclosure relates to technology for a fully differential adjustable gain device that includes differential input terminals, differential output terminals, fully differential signal processing circuitry, and first and second cross-coupled segments. The first cross-coupled segment is coupled between differential input terminals of the fully differential adjustable gain device and a negative input of the fully differential signal processing circuitry. The second cross-coupled segment is coupled between differential input terminals of the fully differential adjustable gain device and a positive input of the fully differential signal processing circuitry. The fully differential adjustable gain device has a gain that is adjustable by adjusting values of the first and second cross-coupled segments, while maintaining a substantially consistent frequency response and a substantially consistent input impedance of the fully differential adjustable gain device, so long as a specified relationship between values of the first and second cross-coupled segments is kept substantially constant.

Fully differential adjustable gain devices and methods for use therewith

Method and implementation of gain-bandwidth product (GWB) tuning are disclosed. In an embodiment an operational amplifier (opamp) includes an input stage of the opamp including a differential device pair coupled to a tail device and configured to be responsive to a differential input signal for conducting a first current and an output stage of the opamp including a class AB interface stage circuit and a pair of output devices connected to the class AB interface stage circuit, wherein a first constant gm bias circuit is coupled to an input terminal of the class AB interface stage circuit.

Method and implementation for accurate gain-bandwidth product tuning

An embodiment method includes measuring, by a calibration device, a first output voltage of a variable gain amplifier (VGA) when the VGA is set at a first gain setting and measuring, by a calibration device, a second output voltage of the VGA when the VGA is set at a second gain setting different from the first gain setting. The method further includes calculating, by the calibration device, an offset voltage of a signal path including the VGA using the first output voltage and the second output voltage and calculating, by the calibration device, an internal offset voltage of the VGA using the first output voltage and the second output voltage.

System and method for offset voltage calibration

An embodiment integrated circuit includes a first capacitive element including a first metal-oxide-semiconductor (MOS) capacitor and a second capacitive element coupled in parallel with the first capacitive element, where the second capacitive element includes a second MOS capacitor. Also, the integrated circuit includes a third capacitive element coupled in parallel with the first capacitive element and the second capacitive element, where the third capacitive element includes a first metal-insulator-metal (MIM) capacitor and a fourth capacitive element coupled in parallel with the first capacitive element, the second capacitive element, and the third capacitive element, where the fourth capacitive element includes a second MIM capacitor.

Circuit and method for a multi-mode filter

A system includes a first variable gain amplifier configured to receive an input signal and a first down-mixer coupled to the first variable gain amplifier. Also, the system includes a first current conveyor coupled to the first down mixer, where the first current conveyor includes a first cascode and a second cascode coupled to the first cascode. Additionally, the system includes a first channel filter coupled to the first current conveyor and a second variable gain amplifier coupled to the first channel filter.

Current conveyor circuit and method

A circuit comprising a transconductor amplifier, and a load connected to the transconductor amplifier, wherein the load comprises a load transistor that is passively biased.

Radio frequency low noise amplifier load circuit

An analogue-to-digital converter apparatus comprises a first integrator coupled to a second integrator. The first and second integrators are coupled so as to provide a complex pole. The first integrator is selectively electrically decoupleable from the second integrator, thereby removing the complex pole.

Growing community of inventors

Arlington Heights, IL, United States of America

Matthew Richard Miller