John Fluke Mfg. Co., Inc.

Matthew P Moore

Thomas P Locke

A memory emulation test system is provided with a method of and system for fast functional testing of memories, such as boot ROMs, in microprocessor-based assemblies. The emulative test system includes a synchronization circuit which automatically re-arms itself and generates sync pulses on each and every UUT data access cycle to allow the UUT microprocessor to read every boot ROM memory location and collect data to be computed into a checksum or other signature to be compared with a predetermined signature representative of a correctly functioning and faultless boot ROM.

In a memory emulation test apparatus, a method of and system for fast

A method of functionally testing cache tag RAMs in processor systems where the kernel is typically inaccessible. A test program first determines whether a fault exists at all within the cache tag RAM. If a fault is determined to exist, the faulty RAM location is exercised by sequentially applying patterns of ones and zeros until the pattern of bits actually present at the faulty tag RAM location is determined. A comparison of this pattern of bits with the expected bit pattern provides information as the precise location of the fault so as to permit replacement of defective chips.

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Bellevue, WA, United States of America

Matthew P Moore