International Business Machines Corporation

Matthew M Reiss

Charles Gerard Woychik

Eric A Johnson

Miguel Angel Jimarez

David James Alcoe

Sanjeev Balwant Sathe

Krishna Darbha

A method and structure to electrically couple a semiconductor device to a substrate that is divided into a plurality of segments. Alternatively, a semiconductor device may be divided into a plurality of segments and the plurality of segments are electrically coupled to a single substrate.

Stress reduction in flip-chip PBGA packaging by utilizing segmented chips and/or chip carriers

A method for providing a package for a semiconductor chip that minimizes stresses and strains that arise from differential thermal expansion on chip-to-substrate or chip-to-card interconnections. A collar element of one or more elements is provided. Adhesive material connects the collar element to the electric device and to the substrate that supports it, forming a unitary electrical package.

Method of forming an apparatus to reduce thermal fatigue stress on flip chip solder connections

Stress reduction in flip-chip PBGA packaging by utilizing segmented chip carries

The present invention provides a package for a semiconductor chip that minimizes stresses and strains that arise from differential thermal expansion on chip-to-substrate or chip-to-card interconnections. A collar element of one or more elements is provided. Adhesive material connects the collar element to the electric device and to the substrate that supports it, forming a unitary electrical package.

Apparatus to reduce thermal fatigue stress on flip chip solder connections

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Endwell, NY, United States of America

Matthew M Reiss