Motorola Corporation

Matthew L Carlson

Bruce A Parker

A trailer microprocessor in a debugging tool runs code a known number of cycles behind a master and shadow pair of processors. A pipeline queues up bus activity from the shadow processor a number of cycles, and then outputs those signals to the trailer microprocessor to execute the same code and signals as the master and shadow microprocessors a known number of cycles behind. The outputs of the master and shadow microprocessors are compared and the trailer microprocessor is halted, along with the master and shadow, when a 'mismatch' occurs between the outputs of the master and shadow processors. When the internal states of all three processors are scanned, the differences in the internal state of the shadow processor before and at a failure can be theoretically compared. The trailer microprocessor may be stepped cycle-by-cycle up to and past the point of failure of the shadow processor for further analysis.

Growing community of inventors

Kyle, TX, United States of America

Matthew L Carlson