Bae Systems Information and Electronic Systems Integration Inc.

Wisterium Development LLC

Callahan Cellular LLC

Matthew J Thiele

Robert P Boland

Peter O Luthi

Peter M Simonson

Frank D Stroili

Kazem Haji-Aghajani

Christopher L Hayes

A reconfigurable compute engine interconnect fabric includes a reconfigurable interconnect layer (, FIG.) between an application layer () and a physical layer () which identifies the input and output pins for the engine and their functions.

Reconfigurable compute engine interconnect fabric

An optical data processing network having an optical network interface is disclosed. The optical data processing network includes a first multi-processor system and a second multi-processor system. The first multi-processor system includes a first set of processors and a first set of optical network interfaces electrically coupled to the first set of processors. Similarly, the second multi-processor system includes a second set of processors and a second set of optical network interfaces electrically coupled to the second set of processors. An optical cable is connected between the first set and the second set of optical network interfaces. The first multi-processor system communicates with the second multi-processor system via the optical cable.

Data processing network having an optical network interface

A reconfigurable compute engine interconnect fabric includes a reconfigurable interconnect layer (FIG.) between an application layer () and a physical layer () which identifies the input and output pins for the engine and their functions.

In a communications or jamming system, accurate timing for the control of the frequency, amplitude, modulation type, pulse repetition rate or other transmit characteristics is achieved for the transmission of digitally processed packetized signals through the use of standard non-realtime off-the-shelf components for the digital processing and a realtime interface which reads transmit chain headers and, with the assistance of a precise time reference, assures that the transmit chain is configured in time to transmit the packets. Note that the realtime interface assures nanosecond timing accuracy regardless of timing errors introduced by the off-the-shelf components used in upstream digital processing.

Method for real time control of transmit chain for software radios

In a communications or jamming system, accurate timing of the transmission of digitally processed signals is accomplished through the use of standard off-the-shelf components. In order to eliminate the need for high-cost, difficult to develop, specific digital hardware or realtime synchronous software not available from the standard off-the-shelf components, the output from the non-real time components is coupled to a realtime interface that assures nanosecond timing accuracy regardless of timing errors introduced by the off-the-shelf components. In one embodiment, the signals to be transmitted are digitized and then packetized, with the data to be transmitted reconstructed using non-real time digital processing. In order to establish the exact time for transmission, the packet is given a time stamp in the form of a header which indicates the exact time at which the packet is to be transmitted by the communications system, with the packet with header being transmitted to a storage buffer, the output of which is coupled to a realtime interface including a precise time output gate, the timing of which is controlled by a precision time reference having nano-second accuracy.

Method for realtime digital processing of communications signals

A multi-level framework that allows an application to be developed independent of the chip or board, and any dependency is built in as part of the framework of the field programmable device (FPD). A shell configuration called a 'wrapper' has a standard look, feel and form factor that provides the interface between the high density language (HDL) application and a standardized and board independent HDL shell, thus isolating the HDL core. A second wrapper is a board specific HDL shell that interacts with the standardized shell. Any application that has the same look, feel and form factor has a common interface that allows various system boards to communicate, providing a mechanism for creating a HDL application component independent of the hardware. An outer shell binds the system to some board and talks to the application program interface (API) layer and the code layer to the outside world, such as the operating system.

Growing community of inventors

Hampstead, NH, United States of America

Matthew J Thiele