Cisco Technology, Inc.

Matthew Irvin

William Patrick Hann

Richard L House

William Keith Brewer

A system for managing data communication between physical layer devices and ATM layer devices in a cell based ATM network is disclosed. A plurality of low speed physical layer devices a high speed physical layer device are connected to a bus. A bus interface device is coupled to the bus, the low speed physical layer devices, and the high speed physical layer device. The bus interface device is operable to provide equal opportunities to access the bus to any connected physical layer device. An arbiter is coupled to the low speed physical layer devices, the high speed physical layer devices, and the bus interface device. The arbiter is operable to provide the high speed physical layer device with disproportionately frequent access to the bus.

System and method of operation for managing data communication between physical layer devices and ATM layer devices

A system for managing data communication between physical layer devices and ATM layer devices in a cell based ATM network includes a plurality of low speed physical layer devices, a high speed physical layer device, and a bus connected to the physical layer devices. A bus interface device is coupled to the bus, the low speed physical layer devices, and the high speed physical layer device. The bus interface device permits equal opportunities to access the bus to any connected physical layer device. An arbiter is coupled to the low speed physical layer devices, the high speed physical layer device, and the bus interface device. The arbiter provides the high speed physical layer device with disproportionately frequent access to the bus.

A method and apparatus are provided for generating parity for communication between a physical layer device and an ATM layer device is provided. A data bus is monitored for data comprising an ATM cell transmitted from a physical layer device to an ATM layer device. The header error check of the ATM cell is verified and parity for the ATM cell is generated. Parity is provided to the ATM layer device if the header error check is correct.

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Austin, TX, United States of America

Matthew Irvin