Northwestern University

Other

Matthew Grayson

Yang Tang

Wang Zhou

Chuanle Zhou

Chulin Wang

Mark C Hersam

Ramille N Shah

Adam E Jakus

Seda Ogrenci Memik

John A Rogers

Nicholas R Geisendorfer

Jieyi Long

Juncen Li

William H Reinhardt

Gautham Badri Ramachandran Sundar

Claire Cecelia Onsager

Can Cenap Aygen

Charles M Costakis

Jun Peng

Tejas Shastry

Andreas Tzavelis

Lauren E Lang

Jiajun Luo

Chaunle Zhou

Andrea Grace Klock

A liquid filtration device that includes a cup assembly configured to carry an unfiltered liquid. The cup assembly includes a cup body for receiving the unfiltered liquid and a cup base configured to be removably coupled with the bottom end of the cup body. The liquid filtration device further includes a bottle assembly configured to be plunged into the top of the cup assembly in a plunging direction and seated within the cup assembly when fully plunged. The bottle assembly includes a port configured to be coupled with a filter cartridge and communicate the unfiltered liquid carried by the cup assembly through the filter cartridge to an interior of the bottle assembly. To extract the bottle assembly from the cup assembly, the cup base is uncoupled from the cup body and the bottle assembly is moved in the plunging direction past the bottom end of the cup body.

Water filtering devices and methods of using the same

The disclosed 2-D and 3-D tomographic resistance imaging method improves tomographic resistance image resolution by adopting an orthogonal basis with the maximum number of elements N to describe the maximum resolution resistivity map ρ(r), where this number of elements N is set according to the number of electrodes Q; by defining the orthogonal basis according to any known constraints in the problem, thereby enhancing the resolution where it is needed; by positioning electrodes to be sensitive to these basis functions; and by choosing current I and voltage V contact electrode pairs that maximize signal-to-noise ratio.

High resolution two-dimensional resistance tomography

Systems and/or methods can provide for solid-state refrigeration below 1 degree Kelvin. By applying a simple sequence of ac electrical signals to a gated semiconductor device, electrons are cooled in a refrigeration sequence that, in turn, provides cooling directly to the heat load of interest. Electrons in a single subband of a semiconductor quantum well are expanded adiabatically into several subbands, resulting in a temperature drop. Repeated application of this cycle at MHz-GHz frequencies results in a significant cooling power. The anticipated cooling powers can compete with today's standard cryogenic system, the dilution refrigerator, which represents the market standard for achieving cryogenic temperatures.

Cryogenic solid state heat pump

Systems and methods include an electrical switch that establishes a first electrical conducting path between terminals of an electrical measurement apparatus through one or more electrical leads and an electrically-conductive sample in a first state, and a second electrical conducting path between the terminals through the one or more electrical leads while bypassing the sample in a second state. A voltage Vis measured across all of the sample and the one or more electrical leads in the first state, while a voltage Vis measured across the one or more electrical leads while bypassing the sample in the second state. Calculations according to the equation V=V&#x2212;Vare performed to determine a precision DC voltage measurement of a voltage across the sample Vin the absence of Seebeck voltage offsets contributed by the one or more electrical leads.

Seebeck cancellation switch for precision DC voltage measurements

Woven flexible thermoelectric fabrics are provided. The fabric is a woven material that includes a series of longitudinal threads interwoven with a series of transverse threads. Within the longitudinal series, the threads have a repeating thread pattern of an n-type thermoelectric thread, a p-type thermoelectric thread, and an insulating thread. Within the transverse series, the threads have a repeating thread pattern of a first double-sided thread with conducting side down and insulating side up, a second double-sided thread with conducting side down and insulating side up, and a third double-sided thread with conducting side up and insulating side down.

Flexible woven thermoelectric fabrics for thermal management

A transverse thermoelectric includes a first array of hole-conducting nanowires and a second array of electron-conducting nanowires positioned orthogonal to the first array of nanowires. A substrate provides structure to the first array of nanowires and the second array of nanowires.

System and method for nanowire-array transverse thermoelectrics

Systems and methods provide a device for characterizing a thin film, including a conducting or insulating substrate, an active layer on the conducting or insulating substrate to be characterized, and a plurality of stripline electrodes on the active layer. The plurality of stripline electrodes include a pitch width of a same order as the thickness of the active layer and strip width smaller than the thickness of the active layer.

System and method for stripline electrodes for thin-film characterization

Systems and methods can provide a fast and accurate way to measure conductivity and Hall effect, such that transient conductivities, transient carrier densities or transient mobilities can be measured on millisecond time scales, for example. The systems and methods can also reduce the minimum magnetic field needed to extract carrier density or mobility of a given sample, and reduce the minimum mobility that can be measured with a given magnetic field.

System and method for electrical characterization of electrical materials

A system and a method determine a quality of a doped semiconductor layer in terms of a charge carrier density gradient by measuring two magnetic-field-dependent resistances using four contacts of a specimen.

System and method for deducing charge density gradients in doped semiconductors

A probe assembly includes plural capacitive contacts that are separate from each other and a conductive depletion gate disposed between and separating the contacts from each other. The depletion gate is configured to receive a direct electric voltage to deplete regions of a sample under test of electrons. The contacts are configured to be placed in close proximity to a buried conducting layer in the sample under test without engaging the buried conducting layer, thereby capacitively coupling to the buried conducting layer. A first subset of the capacitive contacts is configured to apply an alternating electric current to a portion of the sample under test and a second subset of the capacitive contacts is configured to sense an alternating voltage response of the portion of the sample under test to characterize one or more electrical properties of the sample under test without the capacitive contact with the buried conductive layer.

Probe assembly and method for contactless electrical characterization of buried conducting layers

A transverse thermoelectric device includes a superlattice body, electrically conductive first and second contacts, and first and second thermal contacts. The superlattice body extends between opposite first and second ends along a first direction and between opposite first and second sides along a different, second direction. The superlattice body includes alternating first and second layers of crystalline materials oriented at an oblique angle relative to the first direction. The electrically conductive first contact is coupled with the first end of the superlattice and the electrically conductive second contact is coupled with the second end of the superlattice. The first thermal contact is thermally coupled to the first side of the superlattice and the second thermal contact is thermally coupled to the second side of the superlattice. A Seebeck tensor of the superlattice body is ambipolar.

Anisotropic ambipolar transverse thermoelectrics and methods for manufacturing the same

An integrated circuit chip is defined by a stack of several interconnected layers. The integrated circuit chip includes at least two layers of dissimilar metal patterned to define an array of integrated bimetallic thermocouples.

Growing community of inventors

Evanston, IL, United States of America

Matthew Grayson