Asm America, Inc.

Asm IP Holding B.v.

Matthew G Goodman

Mark R Hawkins

Loren R Jacobs

Robert Michael Vyne

John Tolle

Michael W Halpin

Derrick W Foster

Cornelius Alexander Van Der Jeugd

John F Wengert

Jason M Layton

Hartmann Glenn

Ravinder K Aggarwal

Tony J Keeton

Frank B M Van Bilsen

Eric R Hill

Ivo Johannes Raaijmakers

Shawn George Thomas

Michael J Meyer

Eric Alan Barrett

Franciscus B M Van Bilsen

Michael Eugene Givens

Keith Doran Weeks

Joe Margetis

Xing Lin

Alexandros Demos

Junwei Su

Wentao Wang

Caleb Miskin

Amir Kajbafvala

Rutvij Naik

Nupur Bhargava

Gregory M Bartlett

Shujin Huang

Youness Alvandi-Tabrizi

Robinson James

Frank B Van Bilsen

Robin Scott

Sandeep Mehta

Thomas John Kirschenheiter

Kevin Eugene Quinn

A susceptor has a circular pocket portion, an annular ledge portion, and an annular rim ledge portion. The circular pocket portion is arranged along a rotation axis and has a perforated surface. The annular ledge portion extends circumferentially about pocket portion and has ledge surface that slopes axially upward from the perforated surface. The rim portion extends circumferentially about the ledge portion and is connected to the pocket portion by the ledge portion of the susceptor. The susceptor has one or more of a tuned pocket, a contact break, a precursor vent, and a purge channel located radially outward of the perforated surface to control deposition of a film onto a substrate supported by the susceptor. Semiconductor processing systems, film deposition methods, and methods of making susceptors are also described.

Susceptors with film deposition control features

A susceptor including a generally circular body having a face with a radially inward section and a radially outward section proximate a circumference of the body, the radially outward section having at least one ring extending upward for contacting a bottom surface of a substrate, and wherein the radially inward section lacks a ring extending upward from the face.

Susceptor with ring to limit backside deposition

The present disclosure relates to a susceptor having a generally circular body having a face with a radially inward section and a radially outward section which includes a substrate supporting surface elevated relative to the radially inward section. A sidewall surrounds the substrate supporting surface which upon retention of a substrate on the radially outward section, the sidewall surrounds the substrate. The sidewall includes a plurality of humps which protrude from the top surface of the sidewall. Advantageously, the plurality of humps may aid in even thickness of deposition of material at the edge of the substrate.

Susceptor with sidewall humps for uniform deposition

A method for forming a silicon-containing epitaxial layer is disclosed. The method may include, heating a substrate to a temperature of less than approximately 950&#xb0; C. and exposing the substrate to a first silicon source comprising a hydrogenated silicon source, a second silicon source, a dopant source, and a halogen source. The method may also include depositing a silicon-containing epitaxial layer wherein the dopant concentration within the silicon-containing epitaxial layer is greater than 3&#xd7;10atoms per cubic centimeter.

Methods for forming silicon-containing epitaxial layers and related semiconductor device structures

A method for integrated circuit fabrication can include removing silicon oxide by a pre-clean process. The pre-clean process can include depositing a halogen-containing material on the surface of a substrate in a first reaction chamber, and transferring the substrate having the halogen-containing material to a second reaction chamber. Silicon oxide material can be removed from a surface of the substrate by sublimating the halogen-containing material in the second reaction chamber. A target material, such as a conductive material, may subsequently be deposited on the substrate surface in the second reaction chamber.

Plasma pre-clean module and process

In some embodiments, a method for integrated circuit fabrication includes removing oxide material from a surface of a substrate, where the surface includes silicon and germanium. Removing the oxide material includes depositing a halogen-containing pre-clean material on a silicon oxide-containing surface and sublimating a portion of the halogen-containing pre-clean material to expose the silicon on the surface. A passivation film is deposited on the exposed silicon. The passivation film may include chlorine. The passivation film may prevent contamination of the silicon surface by chemical species from the later sublimation, which may be at a higher temperature than the earlier sublimation. Subsequently, a remaining portion of the halogen-containing pre-clean material and the passivation film are sublimated. A target material, such as a conductive material, may subsequently be deposited on the substrate surface.

Germanium oxide pre-clean module and process

A method of forming a semiconductor material incorporating an electrical dopant is disclosed. In one aspect, a method of incorporating dopant in a semiconductor film comprises forming a first semiconductor material incorporating the dopant at a first dopant concentration and preferentially etching a portion of the first semiconductor material, wherein etching leaves a first etched semiconductor material incorporating the dopant at a second dopant concentration higher than the first dopant concentration.

Doped semiconductor films and processing

Methods and systems for calibrating a temperature control system in a vapor deposition chamber. A temperature sensor senses temperature within a semiconductor processing chamber and generates an output signal. A temperature control system controls a chamber temperature by controlling a heating apparatus based on the output signal. A method includes instructing the control system to target a setpoint temperature, and depositing a layer of material onto a surface in the chamber by a vapor deposition process. A variation of a property of the layer is measured while depositing the layer, the property known to vary cyclically as a thickness of the layer increases. The measured property is allowed to vary cyclically for one or more cycles. If there is a difference between a time period of one or more of the cycles and an expected time period associated with the setpoint temperature, the temperature control system is adjusted based on the difference.

Calibration of temperature control system for semiconductor processing chamber

A wafer support system comprising a susceptor having top and bottom sections and gas flow passages therethrough. One or more spacers projecting from a recess formed in the top section of the susceptor support a wafer in spaced relationship with respect to the recess. A sweep gas is introduced to the bottom section of the susceptor and travels through the gas flow passages to exit in at least one circular array of outlets in the recess and underneath the spaced wafer. The sweep gas travels radially outward between the susceptor and wafer to prevent back-side contamination of the wafer. The gas is delivered through a hollow drive shaft and into a multi-armed susceptor support underneath the susceptor. The support arms conduct the sweep gas from the drive shaft to the gas passages in the susceptor. The gas passages are arranged to heat the sweep gas prior to delivery underneath the wafer. Short purge channels may be provided to deliver some of the sweep gas to regions surrounding the spacers to cause a continuous flow of protective purge gas around the spacers.

Wafer support system

A wafer holder for supporting a wafer within a CVD processing chamber includes a vertically moveable lift ring configured to support the bottom peripheral surface of the wafer, and an inner plug having a top flat surface configured to support the wafer during wafer processing. The lift ring has a central aperture configured to closely surround the inner plug. When a wafer is to be loaded onto the wafer holder, the lift ring is elevated above the inner plug. The wafer is loaded onto the lift ring in the elevated position. Then, the lift ring is maintained in the elevated position for a time period sufficient to allow the wafer temperature to rise to a level that is sufficient to significantly reduce or even substantially prevent thermal shock to the wafer when the wafer is brought into contact with the inner plug. The lift ring is then lowered into surrounding engagement with the inner plug. This is the wafer processing position of the wafer holder.

Wafer holder with peripheral lift ring

A wafer holder comprises a circular, disc-shaped main portion and a rib extending generally downward from a lower surface of the main portion. The rib encircles the vertical center axis of the wafer holder. The upper surface of the main portion has a wafer-receiving pocket defined by an inner pocket surface surrounded by an outer shoulder. The rib is closed to completely surround a vertical center axis of the main portion. The rib helps to prevent the main portion from inducing symmetric concavity during the manufacture of the wafer holder. In other words, the rib helps to maintain the flatness of the upper surface of the outer shoulder while the main portion is made symmetrically concave.

Wafer holder with stiffening rib

Improvements in the design of a low mass wafer holder are disclosed. The improvements include the use of peripherally located, integral lips to space a wafer or other substrate above the base plate of the wafer holder. A uniform gap is thus provided between the wafer and the base plate, such as will temper rapid heat exchanges, allow gas to flow between the wafer and wafer holder during wafer pick-up, and keep the wafer holder thermally coupled with the wafer. At the same time, thermal disturbance from lip contact with the wafer is reduced. Gas flow during pick-up can be provided through radial channels in a wafer holder upper surface, or through backside gas passages. A thicker ring is provided at the wafer holder perimeter, and is provided in some embodiments as an independent piece to accommodate stresses accompanying thermal gradients. Self-centering mechanisms are provided to keep the wafer holder centered relative to a spider which is subject to differential thermal expansion.

Self-centering wafer support system

An apparatus for processing a semiconductor substrate, including a process chamber having a plurality of walls and a substrate support to support the substrate within the process chamber. A radiative heat source is positioned outside the process chamber to heat the substrate through the walls when the substrate is positioned on the substrate support. In some embodiments, lenses are positioned between the heat source and the substrate to focus or diffuse radiation from the heat source and thereby selectively alter the radiation intensity incident on certain portions of the substrate. In other embodiments, diffusing surfaces are positioned between the heat source and the substrate to diffuse radiation from the heat source and thereby selectively reduce the radiation intensity incident on certain portions of the substrate.

Localized heating of substrates using optics

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Chandler, AZ, United States of America

Matthew G Goodman