Cree Gmbh

Wolfspeed, Inc.

Creeled, Inc.

Matthew Donofrio

John Adam Edmond

Kevin Haberern

Michael John Bergmann

David Beardsley Slater, Jr

Peter Scott Andrews

David T Emerson

James Ibbetson

Hua-Shuang Kong

Kevin Shawne Schneider

Christopher D Williams

Harshad Golakia

Jesse Colin Reiherzer

Joseph Gates Clark

Jayesh Bharathan

Bennett Dean Langsdorf

Simon Bubel

Thomas Place

Winston T Parker

Ian Currier

Christopher P Hussell

Sten Heikman

Zhimin Jamie Yao

Eric Mayer

Hua Shuang Kong

Gerald H Negley

Sei-Hyung Ryu

Anant Kumar Agarwal

Raymond Rosado

Bradley E Williams

Elif Balkas

Pritish Kar

Bernd P Keller

Qingchun Zhang

Colin Kelly Blakely

Brian Thomas Collins

Mrinal Kanti Das

Jeffrey Carl Britt

Yuvaraj Dora

Ting Li

Ronan Letoquin

Harry A Seibel

Arthur Fong-Yuen Pun

Shaow B Lin

Troy Gould

Nathaniel O Cannon

Fan Zhang

Iliya Todorov

Brad Williams

Jack Vu

Anoop Mathew

David Der Chi Chang

Doowon Suh

Howard Nordby

John M Clayton, Jr

Steven Scott Gilmore

Jay Thomas Norman

Rajeev Acharya

Zhimin James Yao

Kevin Shawne Schnelder

Silicon carbide (SiC) wafers and related methods are disclosed that include intentional or imposed wafer shapes that are configured to reduce manufacturing problems associated with deformation, bowing, or sagging of such wafers due to gravitational forces or from preexisting crystal stress. Intentional or imposed wafer shapes may comprise SiC wafers with a relaxed positive bow from silicon faces thereof. In this manner, effects associated with deformation, bowing, or sagging for SiC wafers, and in particular for large area SiC wafers, may be reduced. Related methods for providing SiC wafers with relaxed positive bow are disclosed that provide reduced kerf losses of bulk crystalline material. Such methods may include laser-assisted separation of SiC wafers from bulk crystalline material.

Silicon carbide wafers with relaxed positive bow and related methods

Monolithic LED chips are disclosed comprising a plurality of active regions on a submount, wherein the submount comprises integral electrically conductive interconnect elements in electrical contact with the active regions and electrically connecting at least some of the active regions in series. The submount also comprises an integral insulator element electrically insulating at least some of the interconnect elements and active regions from other elements of the submount. The active regions are mounted in close proximity to one another with at least some of the active regions having a space between adjacent ones of the active regions that is 10 percent or less of the width of one or more of the active regions. The space is substantially not visible when the LED chip is emitting, such that the LED chips emits light similar to a filament.

High voltage monolithic LED chip

A crystalline material processing method includes forming subsurface laser damage at a first average depth position to form cracks in the substrate interior propagating outward from at least one subsurface laser damage pattern, followed by imaging the substrate top surface, analyzing the image to identify a condition indicative of presence of uncracked regions within the substrate, and taking one or more actions responsive to the analyzing. One potential action includes changing an instruction set for producing subsequent laser damage formation (at second or subsequent average depth positions), without necessarily forming additional damage at the first depth position. Another potential action includes forming additional subsurface laser damage at the first depth position. The substrate surface is illuminated with a diffuse light source arranged perpendicular to a primary substrate flat and positioned to a first side of the substrate, and imaged with an imaging device positioned to an opposing second side of the substrate.

Laser-assisted method for parting crystalline material

A method for removing a portion of a crystalline material (e.g., SiC) substrate includes joining a surface of the substrate to a rigid carrier (e.g., >800 μm thick), with a subsurface laser damage region provided within the substrate at a depth relative to the surface. Adhesive material having a glass transition temperature above 25° C. may bond the substrate to the carrier. The crystalline material is fractured along the subsurface laser damage region to produce a bonded assembly including the carrier and a portion of the crystalline material. Fracturing of the crystalline material may be promoted by (i) application of a mechanical force proximate to at least one carrier edge to impart a bending moment in the carrier; (ii) cooling the carrier when the carrier has a greater coefficient of thermal expansion than the crystalline material; and/or (iii) applying ultrasonic energy to the crystalline material.

Carrier-assisted method for parting crystalline material along laser damage region

A method for processing a crystalline substrate to form multiple patterns of subsurface laser damage facilitates subsequent fracture of the substrate to yield first and second substrate portions of reduced thickness. Multiple (e.g., two, three, or more) groups of parallel lines of multiple subsurface laser damage patterns may be sequentially interspersed with one another, with at least some lines of different groups not crossing one another. Certain implementations include formation of multiple subsurface laser damage patterns including groups of parallel lines that are non-parallel to one another, but with each line remaining within &#xb1;5 degrees of perpendicular to the &#x3c;110&#x3e; direction of a hexagonal crystal structure of a material of the substrate. Further methods involve formation of initial and subsequent subsurface laser damage patterns that are centered at different depths within an interior of a substrate, with the subsurface laser damage patterns being registered with one another and having vertical extents that are overlapping.

At least one array of LEDs (e.g., in a flip chip configuration) is supported by a substrate having a light extraction surface overlaid with at least one lumiphoric material. Light segregation elements registered with gaps between LEDs are configured to reduce interaction between emissions of different LEDs and/or lumiphoric material regions to reduce scattering and/or optical crosstalk, thereby preserving pixel-like resolution of the resulting emissions. Light segregation elements may be formed by mechanical sawing or etching to define grooves or recesses in a substrate, and filling the grooves or recesses with light-reflective or light-absorptive material. Light segregation elements external to a substrate may be defined by photolithographic patterning and etching of a sacrificial material, and/or by 3D printing.

High density pixelated LED and devices and methods thereof

A method for removing a portion of a crystalline material (e.g., SiC) substrate includes joining a surface of the substrate to a rigid carrier (e.g., &#x3e;800 &#x3bc;m thick), with a subsurface laser damage region provided within the substrate at a depth relative to the surface. Adhesive material having a glass transition temperature above 25&#xb0; C. may bond the substrate to the carrier. The crystalline material is fractured along the subsurface laser damage region to produce a bonded assembly including the carrier and a portion of the crystalline material. Fracturing of the crystalline material may be promoted by (i) application of a mechanical force proximate to at least one carrier edge to impart a bending moment in the carrier; (ii) cooling the carrier when the carrier has a greater coefficient of thermal expansion than the crystalline material; and/or (iii) applying ultrasonic energy to the crystalline material.

Flip chip LEDs incorporate multi-layer reflectors and light transmissive substrates patterned along an internal surface adjacent to semiconductor layers. A multi-layer reflector may include a metal layer and a dielectric layer containing conductive vias. Portions of a multi-layer reflector may wrap around a LED mesa including an active region, while being covered with passivation material. A substrate patterned along an internal surface together with a multi-layer reflector enables reduction of optical losses. A light transmissive fillet material proximate to edge emitting surfaces of an emitter chip may enable adequate coverage with lumiphoric material. An emitter chip may be elevated with increased thickness of solder material and/or contacts, and may reduce luminous flux loss when reflective materials are present on a submount. Methods for coating emitter chips with lumiphoric material include one or more of angled spray coating, fillet formation prior to spray coating, stencil island coating, and releasable tape coating.

Low optical loss flip chip solid state lighting device

Monolithic LED chips are disclosed comprising a plurality of active regions on submount, wherein the submount comprises integral electrically conductive interconnect elements in electrical contact with the active regions and electrically connecting at least some of the active regions in series. The submount also comprises an integral insulator element electrically insulating at least some of the interconnect elements and active regions from other elements of the submount. The active regions are mounted in close proximity to one another with at least some of the active regions having a space between adjacent ones of the active regions that is 10 percent or less of the width of one or more of the active regions. The space is substantially not visible when the LED chip is emitting, such that the LED chips emits light similar to a filament.

Simplified LED chip architectures or chip builds are disclosed that can result in simpler manufacturing processes using fewer steps. The LED structure can have fewer layers than conventional LED chips with the layers arranged in different ways for efficient fabrication and operation. The LED chips can comprise an active LED structure. A dielectric reflective layer is included adjacent to one of the oppositely doped layers. A metal reflective layer is on the dielectric reflective layer, wherein the dielectric and metal reflective layers extend beyond the edge of said active region. By extending the dielectric layer, the LED chips can emit with more efficiency by reflecting more LED light to emit in the desired direction. By extending the metal reflective layer beyond the edge of the active region, the metal reflective layer can serve as a current spreading layer and barrier, in addition to reflecting LED light to emit in the desired direction. The LED chips can also comprise self-aligned and self-limiting features that simplify etching processes during fabrication.

High efficiency LEDs and methods of manufacturing

Growing community of inventors

Raleigh, NC, United States of America

Matthew Donofrio