Sigmatel, Inc.

Freescale Semiconductor,inc.

Silicon Laboratories Inc.

Motorola Corporation

Matthew Brady Henson

Marcus William May

Daniel Patrick Mulligan

Matthew Derrell Felder

David Moore

Michael R May

David Cureton Baker

Russell Alvin Schultz

Charles Edward Batey, Jr

John P Willis

Thomas Glen Ragan

William Franklin Dunn, Jr

Marc Kevin Jordan

Greg Hodgson

Anna M Worthy

Dave Baker

Debby Gumto Clarke

Mechanically tuned radios and related methods are disclosed that utilize ratiometric time measurements to detect settings for mechanical adjustment mechanisms. The radio systems and methods disclosed make a first time measurement associated with a mechanically adjusted circuit, make a second time measurement associated with the mechanically adjusted circuit, determine a setting for the mechanical adjustment mechanism based upon a ratio associated with the first and second time measurements, and utilize the setting to select a tuning frequency for signals received by the radio. More generally, ratiometric time measurements can be used to determine a setting for a mechanical adjustment mechanism for a mechanically adjusted circuit, and this setting can be used to at least part control a desired operational feature of a device.

Mechanically tuned radio utilizing ratiometric time measurements and related methods

According to one aspect of the present invention, a controller is coupled to at least first and second signal processors (at least one of which includes analog demodulation circuitry and another of which includes digital demodulation circuitry). The controller may operate to disable the first signal processor responsive to a control signal that indicates that a second signal (corresponding to a demodulator output) is available from the second signal processor.

Controlling power consumption in a radio tuner

A wireless transceiver includes a first integrated circuit and a second integrated circuit. The first integrated circuit includes a memory module that stores a plurality of operational instructions for implementing a plurality of protocol layers of a wireless protocol, a processing module that executes the plurality of operational instructions, and a first interface module. The second integrated circuit includes a second interface module that couples data to and from the first interface module, an RF transceiver that modulates a first baseband signal to produce a transmitted RF signal, and that demodulates a received RF signal to produce a second baseband signal, and a baseband module that generates the first baseband signal based on data received from the first interface module via the second interface module, and that generates data based on the second baseband signal to send to the first interface module via the second interface module.

Wireless transceiver and method for use therewith

A wireless handset or wireless headset includes a Bluetooth transceiver that is coupleable to an external Bluetooth compatible device, that sends the first audio data to the external Bluetooth compatible device and that receives the second audio data from the external Bluetooth compatible device. The Bluetooth transceiver includes a first integrated circuit that includes a memory module that stores a plurality of operational instructions for implementing a plurality of protocol layers of a Bluetooth protocol, a processing module that executes the plurality of operational instructions, and a first interface module. A second integrated circuit includes a second interface module that couples data to and from the first interface module, an RF transceiver that modulates a first baseband signal to produce a transmitted RF signal, and that demodulates a received RF signal to produce a second baseband signal, and a baseband module that generates the first baseband signal based on data received from the first interface module via the second interface module, and that generates data based on the second baseband signal to send to the first interface module via the second interface module.

Wireless handset and wireless headset with wireless transceiver

A processing system includes a processing module and a memory module for storing plurality of data. A controllable power source supplies a source voltage to the memory module in response to a target voltage. A controller module receives a temperature signal and adjusts the target voltage in response to the temperature signal.

Processing system and methods for use therewith

A handheld audio system includes a radio signal decoder integrated circuit (IC) and a digital audio processing integrated circuit. The radio signal decoder integrated circuit produces a digital left channel signal and a digital right channel signal from a received radio signal in accordance with an enable signal and also produces a system clock. The digital audio processing integrated circuit includes a DC-to-DC converter and a processing module. The DC-to-DC converter is operably coupled to produce at least one power supply voltage based on the system clock. The processing module is operably coupled to produce the enable signal when the at least one power supply voltage has reached a desired level and to produce audio signals for audio playback from at least one of the digital left and right channel signals and a stored digital audio file.

Handheld audio system

A headphone driver includes a driver module for generating a plurality of headphone driver signals including a filtered stereo sum signal.

Headphone driver and methods for use therewith

A method and system for utilizing multiple speakers in a portable electronic device is disclosed. The method includes receiving an input at a user interface of a portable electronic device, switching a first and second speaker in a stereo configuration to a mono configuration by routing a first digital to analog converter (DAC) output to both the first and second speaker in response to the input and coupling a third speaker to a second DAC to receive a first audio signal that is responsive to the input. The system includes a first digital to analog converter coupled to a first speaker, a second DAC coupled to a second speaker, and a third speaker. The system further includes switching logic coupled to the first and second DACs. The switching logic is responsive to an input signal provided by a user interface of a portable device. In response to an input signal from the user interface, the switching logic couples the first and second speakers to the first DAC and the third speaker to the second DAC.

System and method of routing audio signals to multiple speakers

A system-on-a-chip integrated circuit includes a multimedia module that produces rendered output data and a high-speed interface. A processing module generates output multimedia data in accordance with at least a portion of a multimedia application in response to input multimedia data received from either the multimedia module or the high-speed interface. The output multimedia data is provided to either the multimedia module or the high-speed interface. An on-chip DC-to-DC converter converts a battery voltage into a supply voltage that is coupled to the multimedia module, the high-speed interface, and/or the processing module.

System-on-a-chip for processing multimedia data and applications thereof

A wireless handset includes a long range wireless transceiver for selectively providing an inbound communication and an outbound communication through a wireless telephone network. A battery monitor module monitors a remaining power of a battery and produces a control signal when the remaining power compares unfavorably to a reserve power threshold. A processing module allows an outbound communication to an allowed recipient when the control signal is asserted, and prohibits an outbound communication to a disallowed recipient when the control signal is asserted.

Wireless handset having selective communication control and corresponding methods

A method of controlling a clock frequency is disclosed and includes monitoring a plurality of master devices that are coupled to a bus within a system. The method also includes receiving an input from at least one of the plurality of master devices. The input can be a request an increase to the clock frequency of the bus. Further, the method includes selectively increasing the clock frequency of the bus in response to the request.

System and method of managing clock speed in an electronic device

A method for mitigating interference from a switched-mode power supply begins by comparing a channel of interest of a plurality of channels with a switching rate of a switch-mode power supply. The method continues when the channel of interest compares unfavorably to the switching rate by adjusting the switching rate of the switch-mode power supply until the channel of interest compares favorably to the switching rate.

Adjust switching rate of a power supply to mitigate interference

A method for booting a system on a chip (IC) integrated circuit includes reading a warm boot flag stored in a persistent register of an analog portion of the system on a chip IC. A warm boot procedure is executed when the warm boot flag is set.

Method for booting a system on a chip integrated circuit

A circuit for use by a multifunction handheld device is coupleable to an audio output device, the multifunction handheld device including a color video display device and a host interface that is coupleable to a host device. The circuit includes a processing module and a memory interface, operably coupled to a memory that stores a plurality of digitally formatted files, and that stores operational instructions that cause the processing module to receive a first digitally formatted file of the plurality of digitally formatted files from the host device when coupled to the host device via the host interface and store the first digitally formatted file in the memory, wherein the first digitally formatted file includes a compressed audio file; receive a second digitally formatted file of the plurality of digitally formatted files from a host device when coupled to the host device via a host interface and store the second digitally formatted file in the memory, wherein the second digitally formatted file includes a compressed video file; playback a selected one of the plurality of digitally formatted files, the playback including the generation of an audio output signal for the audio output device, when the first digitally formatted file is selected, and the playback including rendering the selected one of the digitally formatted files for the color video display device, when the second digitally formatted file is selected.

Circuit for use with multifunction handheld device with video functionality

The disclosure is directed to a computational system including a processor, cache memory accessible to the processor, and a memory management unit accessible to the processor. The processor is configured to access a virtual memory space to perform a first task and is configured to access the virtual memory space to perform a second task. The virtual memory space references first and second sets of task instructions associated with the first and second tasks, respectively. The virtual memory space references non-instruction data associated with the first task. The cache memory is configured to store the first set of task instructions and the non-instruction data. The memory management unit is configured to determine the physical memory location of the second set of task instructions. The computational system is configured to not write the first set of task instructions and the non-instruction data to a physical location beyond the cache memory.

Growing community of inventors

Austin, TX, United States of America

Matthew Brady Henson