Active-semi, Inc.

Semtech Corporation

Active-semi International, Inc.

Matthew Alan Grant

Steven Huynh

David J Kunst

Zhibo Tao

Trey Roessig

Gary Michael Hurtz

Lin Chen

A programmable analog tile integrated circuit is configured over a standardized bus by communicating tile configuration information from a first integrated circuit tile, through a second integrated circuit tile, to a third integrated circuit tile. Each of the three integrated circuit tiles is part of an integrated circuit. The standardized bus is formed when the tiles are placed adjacent one another. Data bus and control signal conductors of the adjacent tiles line up and interconnect such that each signal conductor is electrically connected to every tile. Tile configuration information may be written to a selected register identified by an address in any selected one of the tiles using the data bus and control lines, regardless of the relative physical locations of the tile sending and the tile receiving the information. Thus, tile configuration information may pass from one tile to another tile, through any number of intermediate tiles.

Communicating configuration information across a programmable analog tile to another tile

A step-down (buck) switching regulator regulates output current without sensing a current external to a converter integrated circuit. The regulator generates a set current that is indicative of a predetermined current level to which the output current is regulated. The regulator generates a sense current whose magnitude is proportional to an inductor current flowing through a power switch during an on time. During a first time period, the sense current is less than the set current. During a second time period, the sense current is greater than the set current. The output current of the regulator is maintained at the predetermined current level such that the first time period is equal to the second time period when the output current equals the predetermined current level. The set current is compared to the sense current in circuitry inside a bootstrap power generator whose voltage fluctuates with the voltage across the inductor.

Regulating current output from a buck converter without external current sensing

A programmable analog tile integrated circuit configuration tool communicates a power management control characteristic query soliciting control requirement information for a novel Power Management Integrated Circuit (PMIC) tile in a Multi-Tile Power Management Integrated Circuit (MTPMIC). The configuration tool receives a user response to the query indicating control requirements across a network. The PMIC tile includes configuration registers. Configuration information bit values stored in the configuration registers control the operational characteristics of the functional circuitry of the tile. The configuration registers of each novel PMIC tile are accessible at pre-defined addresses on a standardized bus of the MTPMIC. In response to the user response, the configuration tool generates appropriate tile configuration information for loading the configuration registers such that the PMIC tile within the MTPMIC is programmed to satisfy the user's control requirements.

Programmable analog tile configuration tool

A programmable analog tile integrated circuit placement tool allows a user to manipulate a graphical representation of a first power management integrated circuit (PMIC) tile with respect to a graphical representation of a second PMIC tile in a proposed Multi-Tile Power Management Integrated Circuit (MTPMIC). The novel PMIC tiles have pre-defined physical structures including a bus portion and a memory structure for storing configuration information for configuring the tile. When appropriately placed in a MTPMIC, the bus portions of the selected tiles automatically form a standardized bus that accommodates all signal communication required for a functioning MTPMIC. A remote user with minimal training in analog circuit design may command the placement of individual tiles in a proposed MTPMIC layout. Upon receiving a user response indicating satisfaction with the placement of PMIC tiles, the tool quickly and automatically generates physical layout data suitable for fabrication of the MTPMIC.

Programmable analog tile placement tool

An Analog Tile Selection, Placement, Configuration and Programming (ATSPCP) tool communicates a power management characteristic query over a network. The query is displayed to a user on a webpage. The query is a solicitation for desired characteristics of a Power Management Integrated Circuit (PMIC). After receiving user requirements in a response to the query, the tool selects a number of power management integrated circuit tiles having pre-defined physical structures. The pre-defined structure of each tile includes a bus portion and a memory structure for storing configuring information for the tile. When combined in a Multi-Tile Power Management Integrated Circuit (MTPMIC), the bus portions of the selected tiles automatically form a standardized bus that accommodates all signal communication required for a functioning MTPMIC that meets the user requirements. The ATSPCP tool combines the physical layout data of each selected PMIC tile to form composite physical layout data for the overall MTPMIC.

Analog tile selection, placement, configuration and programming tool

An average current-mode controlled converter has a buck mode, a boost mode, and a four-switch mode. In one example, the converter operates in one of the three modes, depending on the difference between the converter output voltage VOUT and the converter input voltage VIN. Whether the four-switch mode is a full-time four-switch mode or a partial four-switch mode is user programmable. The novel converter can also be programmed to operate in other ways. For example, the converter can be programmed so that there is no intervening four-switch mode, but rather the converter operates either in a buck or a boost mode depending on VOUT-VIN. The converter can also be programmed so that the converter always operates in a conventional full-time four-switch mode. In one embodiment, the converter is programmed by setting an offset between two internally generated ramp signals and by setting associated limiting and inverting circuits.

Average current mode controlled converter having a buck mode, a boost mode, and a partial four-switch mode

A cord correction circuit in a primary-side-controlled flyback converter compensates for the loss of output voltage caused by the resistance of the charger cord. In one embodiment, a correction voltage is subtracted from a feedback voltage received from a primary-side auxiliary inductor. A pre-amplifier then compares a reference voltage to the corrected feedback voltage. In another embodiment, the correction voltage is summed with the reference voltage, and the pre-amplifier compares the feedback voltage to the corrected reference voltage. The difference between the voltages on the input leads of the pre-amplifier is used to increase the output voltage to compensate for the voltage lost through the charger cord. The flyback converter also has a comparing circuit and a control loop that maintain the peak level of current flowing through the primary inductor of the converter. Adjusting the frequency and pulse width of an inductor switch signal controls the converter output current.

Compensating for cord resistance to maintain constant voltage at the end of a power converter cord

A programmable analog tile integrated circuit programming tool communicates a power management control characteristic query soliciting control requirement information for a novel power management integrated circuit (PMIC) tile in a multi-tile power management integrated circuit (MTPMIC). The programming tool receives a user response to the query indicating control requirements across a network. The novel PMIC tiles have a pre-defined physical structure including all memory structures required for configuration of each tile and a bus portion. When combined in a multi-tile power management integrated circuit (MTPMIC), the bus portions of the selected tiles automatically form a standardized bus that accommodates all signal communication required for a functioning MTPMIC. The memory structure of each tile is individually addressable via the standardized bus. Thus, in response to control requirements, the programming tool programs a PMIC tile that is part of a MTPMIC to meet the control requirements.

Programmable analog tile programming tool

An inductor current flows through an inductor of a flyback converter. In a constant voltage mode, the pulse width of an inductor switch control signal is adjusted to maintain a constant output voltage of the flyback converter. The inductor switch control signal controls a switch through which the inductor current flows. In a constant current mode, a comparing circuit, a control loop and a clamp generator circuit are used to maintain the peak level of inductor current. The comparing circuit generates a timing signal based on the ramp-up rate of the inductor current. The control loop uses the timing signal and a feedback signal to generate a time error signal. The clamp generator circuit uses the time error signal to generate a clamp signal that adjusts the pulse width of the inductor switch control signal to clamp the peak current output by the flyback converter in the constant current mode.

Regulating output current from a primary side power converter by clamping an error signal

A low-cost integrated circuit is used as a secondary side constant voltage and constant current controller. The integrated circuit has four terminals and two amplifier circuits. A first amplifier circuit is used to sense a voltage on a FB terminal and in response to cause a first current to flow through an OPTO terminal. A second amplifier circuit is used to sense a voltage between a SENSE terminal and a SOURCE terminal and in response to cause a second current to flow through the same OPTO terminal. The FB terminal is used for output voltage feedback and is also used to supply power onto the integrated circuit. The SOURCE terminal is used for output current feedback and is also used as power supply return for the integrated circuit. The cost of the integrated circuit is reduced by having only four terminals.

Secondary side constant voltage and constant current controller

A flyback AC/DC switching converter has a constant voltage (CV) mode. The CV mode has sub-modes. In one sub-mode ('mid output power sub-mode'), the output voltage (VOUT) of the converter is regulated using both pulse width modulation and pulse frequency modulation. Both types of modulation are used simultaneously. In a second sub-mode ('low output power sub-mode'), VOUT is regulated using pulse width modulation, but the converter switching frequency is fixed at a first frequency. By setting the first frequency at a frequency above the frequency limit of human hearing, an undesirable audible transformer humming that might otherwise occur is avoided. In some embodiments, the converter has a third sub-mode (&#x201c;high output power sub-mode&#x201d;), in which pulse width modulation is used but the switching frequency is fixed at a second frequency. By proper setting of the second frequency, undesirable EMI radiation and other problems that might otherwise occur are avoided.

Flyback constant voltage converter having both a PWFM mode and a PWM mode

A comparing circuit and a control loop are used to maintain the peak level of current flowing through an inductor of a flyback converter. An inductor switch control signal controls an inductor switch through which the inductor current flows. The inductor current increases at a ramp-up rate during a ramp time and stops increasing at the end of the ramp time. The comparing circuit generates a timing signal that indicates a target time at which the inductor current would reach a predetermined current limit if the inductor current continued to increase at the ramp-up rate. The control loop then receives the timing signal and compares the target time to the end of the ramp time. The pulse width of the inductor switch control signal is increased when the target time occurs after the end of the ramp time. Adjusting the pulse width controls the peak of the inductor current.

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Palo Alto, CA, United States of America

Matthew Alan Grant