Infineon Technologies Austria Ag

Infineon Technologies Ag

Matteo-Alessandro Kutschak

Manuel Escudero Rodriguez

Hans Weber

Andreas Riegler

Franz Hirler

Ralf Otremba

David Meneses Herrera

Klaus Schiess

Oliver Haeberlen

Christian Fachmann

Otto Wiedenbauer

Björn Fischer

Josef Hoeglauer

Carsten Von Koblinski

Teck Sim Lee

Bernhard Zojer

Christian Rainer

Winfried Kaindl

Uwe Kirchner

Bernd Schmoelzer

Manfred Pippan

Severin Kampl

Guenther Lohmann

Wolfgang Peinhopf

Alessandro Pevere

Juan Miguel Martinez Sanchez

A transistor device is disclosed. The transistor device includes: a semiconductor body (); a drift region () in the semiconductor body (); a plurality of transistor cells (); and a gate node (G) and a source node (S), wherein each of the plurality of transistor cells () includes: a first trench electrode () insulated from the semiconductor body () by a first dielectric layer (); a second trench electrode () insulated from the semiconductor body () by a second dielectric layer (); a source region () and a body region () in a first mesa region () between the first trench electrode () and the second trench electrode (); and a compensation region (), wherein the compensation region () adjoins the body region (), the first dielectric (), the second dielectric (), and forms a pn-junction with the drift region (), and wherein from the first trench electrode () and the second trench electrode () at least the first trench electrode () is connected to the gate node (G).

Superjunction transistor device

A power converter includes: a solid-state transformer having a DC input and isolated DC outputs; a half bridge converter stage for each isolated DC output of the solid-state transformer, wherein an input of each half bridge converter stage is connected to the corresponding isolated DC output and an output of the half bridge converter stages are electrically connected in a cascade configuration; an output inductor shared by the half bridge converter stages and configured to deliver an output current; and a controller configured to implement phase shift control of the half bridge converter stages relative to one another, based on the number of half bridge converter stages and an output voltage of the power converter being regulated, such that each half bridge converter stage processes the full output current but only a fraction of the output voltage. Methods of controlling the power converter are also described.

Power converter having a solid-state transformer and a half bridge converter stage for each isolated DC output of the solid-state transformer

A method is disclosed. The method includes switching off a power transistor circuit in an electronic circuit. The electronic circuit includes a power source and a load circuit. The power transistor circuit is connected between the power source and the load circuit. Switching off the power transistor circuit includes operating at least one power transistor included in the power transistor circuit in an Avalanche mode so that at least a portion of energy stored in the electronic circuit before switching off the power transistor circuit is dissipated in the at least one power transistor.

Method for operating a power transistor circuit

An electronic circuit is disclosed. The electronic circuit includes: a half-bridge with a first transistor device () and a second transistor device (); a first biasing circuit () connected in parallel with a load path of the first transistor device () and comprising a first electronic switch (); a second biasing circuit () connected in parallel with a load path of the second transistor device () and comprising a second electronic switch (); and a drive circuit arrangement (DRVC). The drive circuit arrangement (DRVC) is configured to receive a first half-bridge input signal (Sin) and a second half-bridge input signal (Sina), drive the first transistor device () and the second electronic switch () based on the first half-bridge input signal (Sin), and drive the second transistor device () and the first electronic switch () based on the second half-bridge input signal (Sina).

Electronic circuit with a transistor device and a biasing circuit

Disclosed is a method and a control circuit. The method includes operating a buffer circuit in a first operating mode or a second operating mode. Operating the buffer circuit in the first operating mode includes buffering, by a first capacitor of the buffer circuit, power provided by a power source and received by a load. Operating the buffer circuit in the second operating mode includes connecting a second capacitor in series with the first capacitor to form a capacitor series circuit, supplying power to the load by the capacitor series circuit, and regulating a first voltage across the capacitor series circuit. Regulating the first voltage includes transferring charge from the first capacitor to the second capacitor.

Method for extending hold-up time

The primary side of an LLC converter includes a primary-side switch network connected to an LLC network having a first winding of an isolation transformer. The secondary side includes a secondary-side switch network having first and second rectification branches coupled to different tap points of a second winding of the isolation transformer. Switching of the secondary-side switch network is controlled based on a drive signal and a current sense signal indicative of current in the rectification branches. For a first part of each switching cycle, discontinuous conduction mode (DCM) is detected based on a falling edge of the current sense signal occurring before a falling edge of the drive signal for the first rectification branch. For a second part of each switching cycle, DCM is detected based on the falling edge of the current sense signal occurring before a falling edge of the drive signal for the second rectification branch.

Synchronous rectifier controller and related sensing circuitry for series-parallel resonant converters

Electronic circuits are disclosed. One electronic circuit includes: a transistor device having a load path and a drive input; a first drive circuit configured to receive a supply voltage and generate a drive signal for the transistor device based on the supply voltage; and a biasing circuit connected in parallel with the load path of the transistor device. The biasing circuit includes a bias voltage circuit configured to receive the supply voltage and generate a bias voltage higher than the supply voltage based on the supply voltage.

Electronic circuit having a transistor device and a biasing circuit

A connection body which comprises a base structure at least predominantly made of a semiconductor oxide material or glass material, and an electrically conductive wiring structure on and/or in the base structure, wherein the electrically conductive wiring structure comprises at least one vertical wiring section with a first lateral dimension on and/or in the base structure and at least one lateral wiring section connected with the at least one vertical wiring section, wherein the at least one lateral wiring section has a second lateral dimension on and/or in the base structure, which is different to the first lateral dimension.

Semiconductor oxide or glass based connection body with wiring structure

A phase-shifted full bridge (PSFB) switching converter includes a transformer having a primary winding and a secondary winding; an input capacitor coupled to the primary winding via a first transistor full bridge; an output inductor coupled to the secondary winding via a synchronous rectifier circuit including at least one first transistor and at least one second transistor; and a controller circuit for generating switching signals for the rectifier circuit to operate the PSFB switching converter in reverse direction. During a startup phase, at the beginning of which the input capacitor is substantially discharged, the at least one first transistor is switched on in each switching cycle to allow an inductor current to pass from an output node, via the output inductor and the secondary winding, to a ground node, the at least one first transistor is again switched off when the inductor current reaches a threshold value.

Switching converter

A transistor device is enclosed. The transistor device includes: a semiconductor body; a plurality of drift regions of a first doping type; a plurality of compensation regions of a second doping type adjoining the drift regions; and a plurality of transistor cells each including a body region adjoining a respective one of the plurality of drift regions, a source region adjoining the body region, and a gate electrode adjacent the body region and dielectrically insulated from the body region by a gate dielectric. The source regions of the plurality of transistor cells are connected to a source node, the body regions of the plurality of transistor cells are separated from the plurality of compensation regions in the semiconductor body, and the plurality of compensation regions are ohmically connected to the source node.

Superjunction transistor device with soft switching behavior

A method for operating a superjunction transistor device and a transistor arrangement are disclosed. The method includes operating the superjunction transistor device in a diode state. Operating the superjunction transistor device in the diode state includes applying a bias voltage different from zero between a drift region of at least one transistor cell of the superjunction transistor device and a compensation region of a doping type complementary to a doping type of the drift region. The compensation region adjoins the drift region, and a polarity of the bias voltage is such that a pn-junction between the drift region and the compensation region is reverse biased.

Method for operating a superjunction transistor device

A phase-shifted full bridge (PSFB) switching converter includes a transistor full-bridge having first and second half-bridges. Each half-bridge includes a high-side transistor and a low-side transistor. A controller circuit is configured to generate a drive signal for each transistor. The (first/third and second/fourth) drive signals for the transistors of each half-bridge are periodic with a cycle period, pulse-width modulated and have a temporal offset to each other that equals half of the cycle period. The drive signals for the half-bridges are phase shifted-with respect to one another. The controller circuit also is configured to generate the first drive signal so that the first high-side transistor is switched off when the third drive signal indicates to switch on the second high-side transistor, and to generate the second drive signal so that the first low-side transistor is switched off when the fourth drive signal indicates to switch on the second low-side transistor.

A bi-directional LLC converter includes: first and second sides coupled by an isolation transformer, the first side including a switch network connected to an LLC network, the LLC network including a first winding of the isolation transformer, the second side including a switch network connected to a second winding of the isolation transformer; and a controller operable to operate the LLC converter in a forward mode in which the first side functions as an inverter and the second side functions as a rectifier, and to operate the LLC converter in a reverse mode in which the second side functions as an inverter and the first side functions as a rectifier. In the reverse mode, the controller is operable to delay turn off of the switch network on the first side at an operating frequency above resonance of the LLC converter, to yield a gain greater than one in the reverse mode.

Bi-directional LLC converter

A phase shift full bridge (PSFB) converter includes: an isolation transformer; a full-bridge having a first pair of switch devices connected in series at a first node coupled to a first terminal of the primary side of the isolation transformer, and a second pair of switch devices connected in series at a second node coupled to a second terminal of the primary side of the isolation transformer; a rectifier coupled to the secondary side of the isolation transformer; and a controller for switching the first and second pairs of switch devices out of phase with each other. Under nominal input voltage conditions for the PSFB, the controller switches the first and second pairs of switch devices at a nominal switching frequency. Under reduced input voltage conditions for the PSFB, the controller switches the first and second pairs of switch devices at a frequency lower than the nominal switching frequency.

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Ludmannsdorf, Austria

Matteo-Alessandro Kutschak