Koninklijke Philips Corporation N.V.

U.S. Philips Corporation

Mathias N M Muris

Franciscus G M De Jong

Guillaume E A Lousberg

Robertus M W Raaijmakers

Johannes De Wilde

Rodger Frank Schuttert

An electronic circuit comprises a plurality of input/output (I/O) nodes for connecting the electronic circuit to a further electronic circuit via interconnects. A main unit implements a normal mode function of the electronic circuit. A test unit tests the interconnects. The electronic circuit has a normal mode in which the I/O nodes are logically connected to the main unit and a test mode in which the I/O nodes are logically connected to the test unit. In the test mode the test unit is operable as a low complexity memory via the I/O nodes.

Circuit with interconnect test unit

Circuit with interconnect test unit and a method of testing interconnects between a first and a second electronic circuit

The invention relates to a method of testing interconnections in integrated circuit (IC) assemblies. Hereto, a test signal is applied to an IC pin (,) providing an input terminal to the interconnection. In known methods, such as the boundary-scan method, a response signal is measured on an output terminal of the interconnection, provided by a further IC pin. According to the invention, however, a response signal is evaluated which is generated on the same terminal (,) as to which the test signal is applied. This has the advantage that the method of the invention can be applied when only one end of the interconnect to be tested can be supplied with appropriate test hardware. The method is particularly suited for testing a capacitance (,) between an IC pin (,) and a supply line, e.g. a ground line.

Connection test method

Growing community of inventors

Eindhoven, Netherlands

Mathias N M Muris