Infineon Technologies Ag

Infineon Technology Ag

Mathias Krause

Christoph Ludwig

Joachim Deppe

Christoph Kleint

Jens-Uwe Sachse

Ricardo Pablo Mikalo

Günther Wein

Ralf Richter

A non-volatile semiconductor memory () comprising a semiconductor substrate () and a plurality of memory cells () and methods for manufacturing such a memory is provided. Each memory cell () comprises a charge-trapping element (), a gate stack (), nitride spacers () and electrically insulating elements (). The charge-trapping element () is arranged on the semiconductor substrate () and comprises a nitride layer () sandwiched between a bottom oxide layer () and a top oxide layer (), the charge-trapping element () having two lateral sidewalls () opposed to one another. The gate stack () is arranged on top of the charge-trapping element (), the gate stack having two lateral sidewalls () opposing one another. The electrically insulating elements () are disposed at opposing sidewalls () of the charge-trapping element () and cover the sidewalls () of the charge-trapping element (). The nitride spacers () cover the electrically insulating elements () and are arranged on opposing sidewalls () of the gate stack () and on the electrically insulating elements ().

Semiconductor memory

Electrically conductive material is introduced into interspaces between the word lines () and is partially removed using a mask () in such a way that residual portions () of the conductive material in each case fill a section of the relevant interspace and produce an electrical contact with source/drain regions (). With further portions of the conductive material, it is possible to form alignment marks for the fabrication process.

Method for fabricating a semiconductor memory having charge trapping memory cells and semiconductor substrate

Growing community of inventors

Dresden, Germany

Mathias Krause