Hitachi, Ltd.

Hitachi Denshi Kabushiki Kaisha

Masuo Umemoto

Yoshizumi Eto

Morishi Izumita

Hidehiro Kanada

Kazuhiro Sato

Seiichi Mita

Toshiyuki Akiyama

Shusaku Nagahara

Kenji Takahashi

Morito Rokuda

Atsushi Saito

Yoshihiro Shiroishi

Hideki Sawaguchi

Takehiko Hamaguchi

Kyo Akagi

Takashi Kawabe

Kouichirou Wakabayashi

Reijiro Tsuchiya

Yuichi Michikawa

Hitoshi Katayama

Shinichi Miyazaki

Hidehiko Sawamura

Nobukazu Doi

Koji Kudo

Katsuro Watanabe

Mikio Suzuki

Seiji Yonezawa

Naoki Satoh

Naoki Ozawa

Kiyoshi Matsumoto

Hirotake Ishii

Yasunori Kanazawa

Teruichi Tomura

Yosuke Hamada

Naoya Kobayashi

Nobuo Murata

Hiroto Yamauchi

Keizo Kato

Kazuyuki Takeshita

Wataru Sakurai

Akira Fukuhara

Kouichi Tomatsuri

Masanori Sato

Alexander Kuznetsov

Sinich Miyazaki

Shigeaki Fujino

Magnetic recorder and magnetooptical recorder

A digital write-and-read method and a signal processing apparatus wherein a write encoder includes a bit distribution circuit for dividing an input data block into n (n: 2 or more) series of bit strings and outputting them in parallel, a first coding circuit for executing predetermined coding for each of data series so distributed and a second coding circuit for converting the output bit series D1 to D3 of the first coding circuit to an n-bit channel code by looking up the previous channel code information, and wherein the second coding circuit executes coding by using a combination having a large Euclidean distance in a partial response equalization output taking inter-symbol interference of at least three bits into consideration as a pair.

Digital write-and-read method and signal processing apparatus

A magnetic digital storage method and system which can improve a recording density and can reduce a cross-talk upon reproducing. An inputted high-speed digital signal is converted to a plurality of low-speed digital signal sequences by a recording circuit and each of the low-speed signal sequence is recorded onto a plurality of adjacent recorded tracks of a recording medium by integrated parallel recording heads. One servo signal is commonly recorded to the plurality of recorded tracks. Further, when recording the digital signal to the adjacent recorded tracks of the recording medium, a delay of a signal that is applied to each recording head is adjusted such that the phases of magnetic transition points given by the recording signal in the adjacent recorded tracks are not identical in the circumferential direction.

Magnetic digital storage method and system wherein magnetic transition

A decision feedback equalization circuit which can be operated at a high speed with a low cost as well as a high-speed digital data communication system and a high-speed digital data recording system using the equalization circuit are disclosed. The decision feedback equalization circuit has data memories which correspond to the number of available values in decision result and in which feedback signals corresponding to all the next decision results are previously prepared as candidates so that a suitable one of the feedback signal candidates is selected and fed back based on the obtained decision result, thus realizing high-speed operation of a feedback loop.

Decision feedback equalization circuit

A method and an apparatus for digital signal recording and/or reproduction are disclosed in which tracks are formed sequentially on a recording medium by use of a head unit mounted on a rotary cylinder, an input digital data is recorded in the recording medium, and the digital data thus recorded is reproduced. The input digital data is modulated into a code word having at least d (d: an integer of at least two) successive bits of high- and low-level data in a signal waveform recorded in the recording medium. The timebase of the code word is compressed. The compressed code word is recorded in the tracks of the recording medium by use of the head unit. The code word recorded and compressed in the recording medium is reproduced. The timebase of the reproduced code word is expanded, and the input digital data is reproduced from the expanded code word.

Method and apparatus for digital signal recording and/or reproduction

A replay equalization circuit for reproducing digital image information recorded on a recording medium includes a transducer for reading the digital image information, an equalization circuit connected to the transducer for equalizing an output of the transducer based on a speed information input, a clock recovery circuit connected to the equalization circuit for extracting a clock signal from an output of the equalization circuit for latching the output of the equalization circuit in response to the clock signal.

Replay equalization circuit in digital image recorder

A demodulation circuit for demodulating a modulated digital including a unit for detecting a specific pattern contained in a series of data before modulation, a unit for judging the phase relation between the specific pattern and a clock pulse used for demodulation, a unit for performing a counting operation on the basis of the result of said judgment, and a unit for controlling the phase of said clock pulse for demodulation on the basis of the count.

Demodulation circuit for digital modulated signal

An original code series containing a synchronizing code is divided into code series, n in number so as to reduce an operation rate to 1/n (n is a positive integer). The detection of a synchronizing pattern is conducted on the basis of a fact that an original synchronizing pattern is transformed into any of patterns of n kinds based on the phase of division.

Circuit for detecting synchronizing code

A digital recording and reproducing system wherein luminance signals digitized and converted into the low speed signals and chrominance signals digitized at the time of recording are distributed among a plural number of channels and the signals of the plural number of channels are recorded respectively on a recording medium. At the time of the reproduction, the signals of the plural number of the channels are reproduced respectively from the recording medium and combined to form the luminance signals and the chrominance signals respectively. The luminance signals in the combined signal are converted into a high speed signal and output terminals for outputting dubbing signals from the system for dubbing the signals are led. The output side of a low speed-to-high speed converter and a channel combination circuit.

Digital signal recording and reproducing system having an interface for

Disclosed is an apparatus in which a picture signal is converted into digital signals and the digital signals are recorded into a recording medium, and which is suitable to perform dubbing of the digital signals reproduced from the recording medium. The apparatus employs the component method in which a luminance signal and chrominance signals constituting a picture signal are recorded separately from each other. According to the component method, the sampling frequency of the chrominance signal is set to be about 1/3-1/4 of that of the luminance signal, and therefore the recording/reproducing of a picture signal is carried out after the bit rate of the digital luminance signal is converted into a value equal to the bit rate of the digital chrominance signal. When digital dubbing is carried out between two apparatus each employing the component method, the taking-in and taking-out of signals to be dubbed are performed with respect to the digital luminance signals and digital chrominance signals having the same bit rate with each other.

Dubbing method and apparatus for digital recording reproducing apparatus

Video signal components including the luminance and color signals are sampled using a clock generator and dividers, and the resultant signals are coded through a plurality of channels and are recorded in a video tape recorder. In order to suppress and disperse in the screen image the effect of an error or a dropout occurring in a channel during a recording/playback process, the coded pixels are distributed to each channel so as to uniformly disperse the pixels associated with each component in the screen image. For this purpose, the pixels on a line perpendicular to the scanning lines on the screen are extracted sequentially from a different channel; consequently, even if a failure takes place in a channel, the erroneous pixel can thus be compensated for by use of the correct pixel just above or below the erroneous pixel. The coded pixels are subjected to a bit reversion or complementing to be conducted on every second pixel, and the direct current component of the obtained signals is suppressed, then the resultant signals are recorded on a recording medium.

Method for distributing and recording video signals and an apparatus

Number data affixed to individual digital data divided into a plurality of data blocks are sequentially read out from a recording medium to be used for determining the write-in positions of the digital data in a memory. For determining the write-in positions of the digital data, the number data of the next write-in position is estimated on the basis of the number data of the current write-in position. Judgment is made as to whether or not the number of times of continuous non-coincidence between the estimated number data and the successively read-out number data exceeds a predetermined setting, and, also judgment is made as to whether or not the number data read out each time falls within a predetermined range. Depending on the results of these judgments, one of the read-out number data and the estimated number data is selected to determine the next write-in position.

Digital data playback system

An apparatus for recording or reproducing codes resulting from digitalizing a picture signal on or from a video tape recorder includes a device for correcting code error produced due to interference in the course of recording or reproducing process. The pixel codes succeeding to one another in time are divided to high-order and low-order bit-blocks, respectively, wherein the high-order bits are used to constitute a pseudo pixel code which is then added with a pixel error correcting code. The pixel code consisting of the high-order bits is added with a bit error correcting code before being recorded. In reproduction, error correction can be realized at higher rate with the aid of the correction codes to improve the quality of reproduced picture.

Method and apparatus for generating error correction codes for digitized

Parity bits (check bits) having a relatively high redundancy are added to upper significant bits of a digital signal, and parity bits having a relatively low redundancy, are added to the lower significant bits of the digital signal. The signal and the parity bits are recorded on a recording medium. The position of an error in a data block group of the lower bits reproduced from the recording medium is estimated as existing in a block in which the error is detected by the check of the data block group of the upper bits, and in the blocks preceding and subsequent to the former. This error correction method is most suitable for a recording and reproduction system of digital video signals.

Method of correcting errors of digital signals in the recording and

In the code modulation system for converting input data levels into an output signal in the form of code words by providing M input levels among N input levels assigned to input data with stairlike code weights on the basis of the input levels, (N-M) input levels which are the difference between said N input levels and said M input levels are respectively disposed near transition points where said stairlike code weight is changed, and the code weights are provided with hysteresis in the ascent process and the descent process of the input data level.

Code modulation system

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Tokyo, Japan

Masuo Umemoto