Cisco Technology, Inc.

David Systems, Inc.

Massimo Prati

Luca Cafiero

Mario Mazzola

Tom Edsall

A switching bus architecture enables efficient transfer of data within a network switch having a plurality of ports interconnected by a high-performance switching bus. The architecture is preferably implemented as novel port interface and forwarding engine circuitry that cooperate to efficiently transmit data to, and receive data from, the switching bus in accordance with a 2-tier arbitration policy that ensures adequate port access to the bus. As a result of such a cooperating arrangement, the architecture improves the transfer efficiency of the switch by providing all ports sufficient bus access to convey accurate data throughout the switch.

Architecture for an expandable transaction-based switching bus

A high-speed digital transceiver is provided for use in a PBX environment comprising twisted-pair wire cables interconnecting like transceivers, each transceiver being operative to exchange voice, data and control information in a packetized format over a common twisted-pair cable. Specifically, each transceiver communicates packetized pulse code modulated information in pure Alternate Mark Inverted (AMI) coding, that is, without the introduction of bipolar violation pulses to provide timing. Frame synchronization is acquired on the first pulse by the use of a digital circuit deriving synchronization from a local high-speed clock. The use of a high-speed clock-driven digital circuit for synchronization acquisition eliminates the need for a phase-locked loop synchronization scheme and its concomitant finite acquisition delay. In addition, a receiving section employs a threshold selecting circuit which switches or makes thresholds in response to an expectation of the absence any bipolar violation in the transmitted signal. The effect of intersymbol interference are further minimized by provision of digital precompensation in the transmitted signal to maximize the slew rate between consecutive pulses. The precompensation scheme is based on a knowledge of the bit pattern and the amount of energy contained in a sequence of bits.

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Mountain View, CA, United States of America

Massimo Prati