Wilinx Corporation

Microchip Technology Inc.

Masoud Djafari

Rahim Bagheri

Edris Rostami

Abbas Komijani

Ahmad Mirzaei

Mohammad E Heidari

Alireza Mehrnia

Mahdi Bagheri

Esmael Heidari

Mohsen Pourkhaatoun

Ali Fard

Siddharth Shetty

Kiran Gowda

Hamid Shafiee

Filipp A Baron

Ali Karimi-Sanjaaani

Mike Choi

Mahnaz Atri

Embodiments of the present disclosure include an OFDM receiver circuit, which includes an FFT circuit configured to calculate an FFT of a plurality of sample values received by the receiver circuit, and a smoothing circuit configured to identify equalizer coefficients for the sample values by truncating portions of an impulse response of the FFT.

Channel estimation in OFDM communication systems

A receiver circuit includes a conversion circuit configured to down-convert a received radio-frequency signal to a baseband signal, an analog-to-digital converter configured to sample the baseband signal into a sampled signal, a Fast Fourier transform (FFT) circuit configured to perform an FFT on the sampled signal, and a digital compensation circuit configured to compensate for IQ distortion in a frequency domain.

Digital compensation of IQ coupling in communication receivers

Embodiments of the present invention include methods for wide bandwidth synthesizer circuits and methods. In one embodiment, the present invention includes a frequency synthesizer comprising a multiplexer and a band group selector. The multiplexer is coupled to receive a plurality of sinusoidal signals. Each sinusoidal signal has a unique frequency. The band group selector selects between a plurality of band groups. The band group selector is coupled to receive a first signal from the multiplexer. The multiplexer multiplexes between the plurality of sinusoidal signals and provides the first signal. The band group selector includes a band mixer. The band mixer mixes the first signal with a band signal having a band frequency. The band signal corresponds to a band group selected from the plurality of band groups. The band group selector provides a transmitter mixer signal and a receiver mixer signal.

Wide bandwidth fast hopping frequency synthesizer circuits and methods

Embodiments of the present invention include circuits and methods for improving the spectral purity of mixer circuits. In one embodiment the present invention includes a mixer circuit comprising a first transistor having a gate, a source and a drain, a second transistor having a gate, a source and a drain, a first capacitance coupled between the source of the first transistor and the source of the second transistor and a bias circuit having an input, a first output coupled to the source of the first transistor and a second output coupled to the source of the second transistor. The present invention may be advantageously used in a wireless transmitter application.

Mixer circuits and methods

Embodiments of the present invention include circuits and methods with wide bandwidths. In one embodiment, parasitic capacitances of the output of a first stage and the input of a second stage are included in a network. The output of the first stage is coupled to the input of the network, and the input of the second stage is coupled to an intermediate node of the network. In one embodiment, the parasitic capacitance of the second stage is the largest capacitance in the network. In another embodiment, passive networks are coupled to the outputs of a stage, and one or more current injection circuits may be used to extend the bandwidth of the circuit.

Wideband circuits and methods

Embodiments of the present invention include a frequency synthesizer comprising a first plurality of dividers receiving a first signal having a first frequency and generating a first plurality of divided signals and a frequency combination network including a plurality of mixers, the frequency combination network receiving one or more of the first plurality of divided signals and generating a plurality of synthesized signals having different frequencies. The frequency combination network may further include additional dividers and multiplexers for more flexibility in synthesizing different frequencies. In one embodiment, the frequency combination network is coupled to dividers in the feedback path of a phase locked loop. The present invention is particularly advantageous for synthesizing frequencies above one (1) gigahertz.

High frequency synthesizer circuits and methods

Embodiments of the present invention include circuits and methods for reducing DC Offset. In one embodiment the present invention includes storing DC offset on internal capacitances. In one embodiment, parallel stages are used to remove DC offset corresponding to different local oscillator frequencies. Embodiments of the invention further include changing the low cutoff frequency of the DC cancellation circuits for fast calibration. In a first state, a high pass filter may have a first low cutoff frequency, and in a second state the high pass filter may have a second cutoff frequency lower than the first low cutoff frequency. The present invention also includes a variable gain amplifier with reduced DC offset.

DC offset cancellation circuits and methods

Embodiments of the present invention include circuits and methods for dividing signals. In one embodiment the present invention includes a divider circuit comprising at least one first divider input receiving an in-phase (I+) signal, at least one second divider input receiving a complement of the in-phase (I&#x2212;) signal, at least one third divider input receiving a quadrature (Q+) signal, and at least one fourth divider input receiving a complement of the quadrature (Q&#x2212;) signal. In one embodiment, the lock range of a divider is improved by providing a first bias current greater than a second bias current.

Divider circuits and methods using in-phase and quadrature signals

Embodiments of the present invention include circuits and methods with wide bandwidths. In one embodiment, parasitic capacitances of the output of a first stage and the input of a second stage are included in a network. The output of the first stage is coupled to the input of the network, and the input of the second stage is coupled to an intermediate node of the network. In one embodiment, the parasitic capacitance of the second stage is the largest capacitance in the network.

Embodiments of the present invention include wideband attenuator circuits and methods. In one embodiment the present invention includes a first divider circuit coupled in series with two or more second divider circuits. The divider circuits include resistance and capacitance values that may be set according to particular relationships. In one embodiment, a wideband attenuator may include capacitors that are selectively coupled to each output node.

Wideband attenuator circuits and methods

Embodiments of the present invention include circuits and methods for dividing high frequency signals. In one embodiment the present invention includes a divider circuit comprising a differential circuit having first and second inputs to receive a first differential signal, a first frequency control input and first and second differential outputs, wherein the differential circuit has a first bias current. The divider circuit further includes a cross-coupled circuit having outputs coupled to the differential circuit outputs and a second frequency control input, wherein the cross-coupled circuit has a second bias current. Embodiments of the present invention may include circuits for controlling the relationship between bias currents and circuit parameters that vary with process or temperature or both.

High frequency divider circuits and methods

Embodiments of the present invention include circuits and methods for improving the spectral purity of mixer circuits. In one embodiment the present invention includes a mixer circuit including a bias circuit, the bias circuit comprising a first transistor having a gate, a source, and a drain, wherein the drain is coupled to a first input of the mixer circuit, a first sensing circuit coupled to the source of the first transistor, and a first comparison circuit coupled to the first sensing circuit, wherein the first comparison circuit receives a feedback signal from the first sensing circuit and a reference voltage, and in accordance therewith, generates a bias control signal to control the bias at the gate of the first transistor.

Mixer circuits and methods with matched bias currents

Embodiments of the present invention include mixer circuits and methods with improved spectral purity. In one embodiment the present invention includes a mixer circuit comprising a first transistor having a gate, a source and a drain, a second transistor having a gate, a source and a drain, a first capacitance coupled between the source of the first transistor and the source of the second transistor and a bias circuit having an input, a first output coupled to the source of the first transistor and a second output coupled to the source of the second transistor. The present invention may be advantageously used in a wireless transmitter application.

Mixer circuits and methods with improved spectral purity

Embodiments of the present invention include circuits for use in wireless receivers that provide wide band matching with improved gain and noise performance. In one embodiment, the present invention includes a wireless receiver comprising an antenna, a first transistor having a source coupled to the antenna, a second transistor having a gate coupled to the antenna and a network comprising a first terminal coupled to the antenna, a second terminal coupled to the source of the first transistor and a third terminal coupled to the gate of the second transistor, wherein the network has a transimpedance between the second and third terminals so that noise generated by the first transistor is differentially rejected by the system across a predetermined range of frequencies.

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Marina Del Rey, CA, United States of America

Masoud Djafari