Mitsubishi Denki Kabushiki Kaisha

Kabushiki Kaisha Hayashibara Seibutsu Kagaku Kenkyujo

National Institute of Advanced Industrial Science and Technology

Sumitomo Seika Chemicals Co., Ltd.

Shizuoka Institute of Science and Technology

Ensuiko Seito Kabushiki Kaisha

Masayuki Yamashita

Osamu Ueda

Shinichi Mori

Toshio Miyake

Shuzo Sakai

Motoi Ashida

Kozo Hara

Namiki Moriga

Kiyoyasu Akai

Masahiko Ishikawa

Kohji Hayano

Kohki Fujita

Yasuhiko Tsunetomi

Takeo Ebina

Koreaki Fujita

Noriyuki Hayashizaka

Yasuhiro Kouro

Satomi Hattori

Takahiro Ishida

Tatsuki Furusho

Hideki Kawamura

Masamitsu Shimasaki

Kazunori Kawasaki

An object of the present invention is to provide an improved partial discharge-resistant electrical insulating resin composition that can inhibit deterioration of an insulator due to partial discharge. The partial discharge-resistant electrical insulating resin composition of the present invention comprises boehmite alumina and a resin.

Electrical insulating resin composition for partial-discharge resistance

A semiconductor device prevents latch up and enables subminiaturization of its structure, and a method can manufacture the semiconductor device. In the semiconductor device containing field-effect transistors of a complementary type, an interconnection containing semiconductor having n-type impurity connects a p-type impurity diffusion region forming an emitter electrode of a parasitically formed bipolar transistor to an n-type impurity diffusion region electrically connected to a power supply line. Thereby, a pn junction operating as a rectifier element is formed at a contact region between a connection portion and the p-type impurity diffusion region.

Semiconductor device with filed-effect transistors of a complementary

A bit line load element for reducing a bit line amplitude during data reading is formed of p- and n-channel MOS transistors connected in parallel. When a word line is driven to the selected state, the p-channel MOS transistor is held off. In the data write operation, both the n- and p-channel MOS transistors are turned off. Even under a low power supply voltage, a sufficiently large bit line amplitude can be produced without an influence by a size of the bit line load element. By deactivating the bit line load element in the data write operation, it is possible to prevent generation of a DC current during data writing.

Static semiconductor memory device operating at high speed under lower

A word line activation signal generated by a timing generator is surely at L level in a prescribed period regardless of the power supply voltage. A row address signal delayed by a delay circuit in a row address buffer changes in a period in which the word line activation signal is at L level. Accordingly, even if skew occurs, a non-selected word line is never activated. Consequently, it is possible to prevent delay of access to a memory cell and erroneous writing to a memory cell.

Semiconductor memory device delaying ATD pulse signal to generate word

Each of the portions corresponding to the crossings of a plurality of first strip conductive layers serving as bit lines and a plurality of second strip conductive layers serving as word lines crossing the conductive layers at right angles is used as one memory cell. An oxide film is provided between the first strip conductive layers and the second strip conductive layers. The thickness of this oxide film is set in each memory cell according to stored data. Also a multi-value memory can be realized, since the amount of stored data in each memory cell is an arbitrary amount of 1 bit or more by making the stored data of a plurality of types of memory cells having different thicknesses in the tunnel oxide film 15 correspond to a plurality of different data. The size of each memory cell can be reduced since the occupying area of each memory cell on the semiconductor substrate is dependent on the width of the first strip conductive layer and the second strip conductive layer. An insulation film in which tunnel phenomenon is generated can be formed using conventional manufacturing technology.

Method of making a mask ROM using tunnel current detection to store data

Mask ROM using tunnel current detection to store data and a method of

An SRAM disclosed herein includes 64 memory cell array blocks and a redundant memory cell array block. The redundant memory cell array includes a total of 16 redundant memory cell columns. A defect address indicating a location of a defective memory column is programmed in an address programming circuit, and the specific defecting column in the defect address is programmed in an I/O programming circuit. Although each memory cell does not include a spare memory cell column or row for redundancy, the defect can be repaired by using a redundant memory cell array, so that the high integration of the SRAM can be accomplished.

Semiconductor memory device including redundant memory cell array for

In accordance with one aspect of the present invention, provided is a semiconductor device comprising a semiconductor chip which is directly covered with a resin material having a light shielding property as well as a film which is provided on the resin material for shielding the semiconductor device against light. The film may be formed by a seal having a surface which is covered with a metal and a rear surface which is colored black, a layer of a metal or ceramics which is deposited in a vapor phase, or a coating of an insulating material whose refractive index is different from that of the resin material. In another aspect of the present invention, provided is a semiconductor device which is directly covered with a resin material mixed with a light absorbing material. In still another aspect of the present invention, provided is a semiconductor device comprising a semiconductor chip, having a surface covered with black polyimide, which is further covered with a resin material having a light shielding property. In a further aspect of the present invention, provided is a package for covering a semiconductor device which is mounted on a wiring board. According to such improvement, a light shielding property is improved particularly in relation to a thin semiconductor device whose thickness is only about 1 mm, and the semiconductor device is prevented from a malfunction caused by light.

Semiconductor device improved in light shielding property and light

Provided is a semiconductor device comprising a semiconductor chip which is directly covered with a resin material having a light shielding property as well as a film which is provided on the resin material for shielding the semiconductor device against light. The film may be formed by a seal having a surface which is covered with a metal and a rear surface which is colored black, a layer of a metal or ceramics which is deposited in a vapor phase, or a coating of an insulating material whose refractive index is different from that of the resin material. In another aspect of the present invention, provided is a semiconductor device which is directly covered with a resin material mixed with a light absorbing material. In still another aspect of the present invention, provided is a semiconductor device comprising a semiconductor chip, having a surface covered with black polyimide, which is further covered with a resin material having a light shielding property. In a further aspect of the present invention, provided is a package for covering a semiconductor device which is mounted on a wiring board. According to such improvement, a light shielding property is improved particularly in relation to a thin semiconductor device whose thickness is only about 1 mm, and the semiconductor device is prevented from a malfunction caused by light.

An improved flash EEPROM with a sense amplifier having a sensing characteristics suitable for sensing a data signal under an externally applied supply voltage Vcc in a lower range, and a sense amplifier having a sensing characteristics suitable for sensing a data signal under the supply voltage Vcc in a higher range. A Vcc level detecting device detects in which range the supply voltage Vcc is in, soasto selectively enable one of sense amplifiers. Since the data signal is amplified using the sense amplifier having the optimum sensing characteristics in accordance with the level of the supply voltage, the stored data can be accurately read.

Semiconductor memory device capable of correct reading of data under

The lactosucrose high-content powder according to the present invention is prepared by allowing an aqueous solution containing sucrose and lactose to act on a saccharidetransferring enzyme, removing concomitant saccharides in the resultant saccharide solution containing lactosucrose to obtain a solution having a high concentration of lactosucrose, i.e. lactosucrose content of 45 w/w % or more of the sugar composition, and spraydrying the resultant solution to obtain a powder having a high concentration of lactosucrose. The powder is incorporated in an orally- or parenterally-administrable product to obtain an orally- or parenterally-administrable product which exerts a selective growth-promoting-effect on a microorganism of the genus Bifidobacterium in vivo.

Process for preparing a powder having a high concentration of

The lactosucrose high-content powder according to the present invention is prepared by allowing an aqueous solution containing sucrose and lactose to act on a saccharide-transferring enzyme, removing concomitant saccharides in the resultant saccharide solution containing lactosucrose to obtain a lactosucrose high-content solution with a lactosucrose content of 45 w/w % or higher on sugar composition, and spray-drying the resultant solution to obtain a lactosucrose high-content powder. The powder is incorporated in an orally- or parenterally-administrable product to obtain an orally- or parenterally-administrable product which exerts a selective growth-promoting-effect on a microorganism of the genus Bifidobacterium in vivo.

Growing community of inventors

Hyogo, Japan

Masayuki Yamashita