Samsung Electronics Co., Ltd.

Masayuki Tomoyasu

Jihyun Lim

Jong Woo Sun

Je Woo Han

Ho Chang Lee

Sung Moon Park

Young Hoon Jeong

Kwang Nam Kim

Incheol Song

Hongmin Yoon

Dong-Chan Kim

Bum-Soo Kim

Jongwoo Sun

Je-Woo Han

Chan-Hoon Park

Kye Hyun Baek

Jewoo Han

Eunwoo Lee

Jong Seo Hong

Kiwook Song

A substrate processing apparatus including a process chamber; a susceptor in the process chamber; and an inner edge ring and an outer edge ring on the susceptor, wherein the inner edge ring includes a semiconductor, the outer edge ring includes an insulator, an upper surface of the outer edge ring is at a higher level than an upper surface of the inner edge ring, and the outer edge ring has an overhang extending onto the inner edge ring.

Substrate processing apparatus and method of processing a substrate

A focus ring includes a first conductive layer having a first thickness and a first specific resistance, a second conductive layer stacked on the first conductive layer, the second conductive layer having a second thickness greater than the first thickness and a second specific resistance greater than the first specific resistance, and a dielectric layer on one of a lower surface of the first conductive layer and an upper surface of the second conductive layer.

Focus ring, chuck assembly for securing a substrate and plasma treatment apparatus having the same

According to some embodiments, a semiconductor substrate processing apparatus includes a housing, a plasma source unit, an electrostatic chuck, and a ring unit. The housing encloses a process chamber. The plasma source unit is connected to the housing, and includes a shower head and a fixing ring positioned to support the shower head. The shower head includes an upper electrode mounted on the fixing ring, and includes injection holes passing through part of the upper electrode and configured to inject gas into the chamber. The electrostatic chuck is connected to the housing and includes a lower electrode, and is for mounting a semiconductor substrate thereon. The ring unit is mounted on an edge portion of the electrostatic chuck, and includes a focus ring and a cover ring surrounding the focus ring. One of the lower electrode and the upper electrode is connected to a high frequency power supply, and the other of the lower electrode and the upper electrode is connected to ground. The focus ring has an inner side surface, and an opposite outer side surface that contacts the cover ring, and a width between the inner side surface and the outer side surface of the focus ring is a first width. The cover ring has an inner side surface that contacts the outer side surface of the focus ring, and an outer side surface, and a width between the inner side surface and the outer side surface of the cover ring is a second width. The first width is between 2 and 10 time the second width.

Capacitively-coupled plasma substrate processing apparatus including a focus ring and a substrate processing method using the same

Substrate processing apparatus including edge ring

Provided are substrate processing systems and methods of managing the same. The method may include displaying a notification for a preventive maintenance operation on a chamber, performing a maintenance operation on the chamber, performing a first optical test, and evaluating the preventive maintenance operation. The first optical test may include generating a reference plasma reaction, measuring a variation of intensity by wavelength for plasma light emitted from the reference plasma reaction, and calculating an electron density and an electron temperature from a ratio in intensity of the plasma light.

Substrate processing system, method of managing the same and method of manufacturing semiconductor device with the same

A method for fabricating a semiconductor device is disclosed. The method includes forming a first interlayer insulating layer including a first trench that is defined by a first gate spacer and a second trench that is defined by a second gate spacer on a substrate, forming a first gate electrode that fills a part of the first trench and a second gate electrode that fills a part of the second trench, forming a first capping pattern that fills the remainder of the first trench on the first gate electrode, forming a second capping pattern that fills the remainder of the second trench on the second gate electrode, forming a second interlayer insulating layer that covers the first gate spacer and the second gate spacer on the first interlayer insulating layer, forming a third interlayer insulating layer on the second interlayer insulating layer and forming a contact hole that penetrates the third interlayer insulating layer and the second interlayer insulating layer between the first gate electrode and the second gate electrode.

Method for fabricating a semiconductor device

Growing community of inventors

Seongnam-si, South Korea

Masayuki Tomoyasu